AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 148

IC ARM9 MCU 217-LFBGA

AT91SAM9RL64-CU

Manufacturer Part Number
AT91SAM9RL64-CU
Description
IC ARM9 MCU 217-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9RL64-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, SPI, SSC, USART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
118
Ram Memory Size
64KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
Package
217LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
240 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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21.6.6.1
Figure 21-3. CompactFlash Memory Mapping
21.6.6.2
6289C–ATARM–28-May-09
I/O Mode, Common Memory Mode, Attribute Memory Mode and True IDE Mode
CFCE1 and CFCE2 Signals
CF Address Space
Within the NCS4 and/or NCS5 address space, the current transfer address is used to distinguish
I/O mode, common memory mode, attribute memory mode and True IDE mode.
The different modes are accessed through a specific memory mapping as illustrated on
21-3. A[23:21] bits of the transfer address are used to select the desired mode as described in
Table 21-5 on page
Note:
Table 21-5.
To cover all types of access, the SMC must be alternatively set to drive 8-bit data bus or 16-bit
data bus. The odd byte access on the D[7:0] bus is only possible when the SMC is configured to
drive 8-bit memory devices on the corresponding NCS pin (NCS4 or NCS5). The Chip Select
Register (DBW field in the corresponding Chip Select Register) of the NCS4 and/or NCS5
address space must be set as shown in
NBS1 and NBS0 are the byte selection signals from SMC and are available when the SMC is set
in Byte Select mode on the corresponding Chip Select.
A[23:21]
000
010
100
110
111
The A22 pin is used to drive the REG signal of the CompactFlash Device (except in True IDE
mode).
CompactFlash Mode Selection
Offset 0x00E0 0000
Offset 0x00C0 0000
Offset 0x0080 0000
Offset 0x0040 0000
Offset 0x0000 0000
148.
AT91SAM9R64/RL64 Preliminary
Table 21-6
Common Memory Mode Space
True IDE Alternate Mode Space
Attribute Memory Mode Space
True IDE Mode Space
Alternate True IDE Mode
I/O Mode Space
Mode Base Address
Common Memory
Attribute Memory
to enable the required access type.
True IDE Mode
I/O Mode
Figure
148

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