AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 709

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

40.6
40.6.1
Figure 40-3. Bidirectional AC-link Frame with Slot Assignment
6289C–ATARM–28-May-09
(Controller Output)
(Codec output)
Functional Description
Protocol overview
AC97RX
AC97FS
AC97TX
Slot #
TAG
TAG
0
AC-link protocol is a bidirectional, fixed clock rate, serial digital stream. AC-link handles multiple
input and output Pulse Code Modulation PCM audio streams, as well as control register
accesses employing a Time Division Multiplexed (TDM) scheme that divides each audio frame
in 12 outgoing and 12 incoming 20-bit wide data slots.
Table 40-2.
Table 40-3.
Slot #
0
1
2
3,4
5
6, 7, 8
9
10
11
12
Slot #
0
1
2
3,4
5
6
7, 8, 9
STATUS
ADDR
CMD
ADDR
1
STATUS
DATA
CMD
DATA
2
AC-link Output Slots Transmitted from the AC’97C Controller
AC-link Input Slots Transmitted from the AC’97C Controller
L Front
LEFT
PCM
PCM
3
R Front
RIGHT
PCM
4
PCM
AT91SAM9R64/RL64 Preliminary
LINE 1
LINE 1
Pin Description
TAG
Command Address Port
Command Data Port
PCM playback Left/Right Channel
Modem Line 1 Output Channel
PCM Center/Left Surround/Right Surround
PCM LFE DAC
Modem Line 2 Output Channel
Modem Handset Output Channel
Modem GPIO Control Channel
DAC
DAC
Pin Description
TAG
Status Address Port
Status Data Port
PCM playback Left/Right Channel
Modem Line 1 ADC
Dedicated Microphone ADC
Vendor Reserved
5
Center
PCM
MIC
PCM
6
L SURR
RSVED
7
PCM
R SURR
RSVED
PCM
8
RSVED
PCM
LFE
9
LINE 2
LINE 2
DAC
ADC
10
11
HSET
HSET
DAC
ADC
STATUS
CTRL
12
IO
IO
709