PIC18F66J15-I/PT Microchip Technology, PIC18F66J15-I/PT Datasheet - Page 398

• Manufacturer Part Number: PIC18F66J15-I/PT
• Description: IC PIC MCU FLASH 48KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J15-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 96KB (48K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10 FAMILY
BSF .................................................................................. 305
BTFSC ............................................................................. 306
BTFSS .............................................................................. 306
BTG .................................................................................. 307
BZ ..................................................................................... 308
C
C Compilers
Calibration (A/D Converter) .............................................. 269
CALL ................................................................................ 308
CALLW ............................................................................. 337
Capture (CCP Module) ..................................................... 171
Capture (ECCP Module) .................................................. 180
Capture/Compare/PWM (CCP) ........................................ 169
Clock Sources .................................................................... 34
CLRF ................................................................................ 309
CLRWDT .......................................................................... 309
Code Examples
Code Protection ............................................................... 281
COMF ............................................................................... 310
DS39663F-page 396
MPLAB C18 ............................................................. 344
MPLAB C30 ............................................................. 344
Associated Registers ............................................... 173
CCP Pin Configuration ............................................. 171
CCPRxH:CCPRxL Registers ................................... 171
Prescaler .................................................................. 171
Software Interrupt .................................................... 171
Timer1/Timer3 Mode Selection ................................ 171
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 170
CCPRxH Register .................................................... 170
CCPRxL Register ..................................................... 170
Compare Mode. See Compare.
Module Configuration ............................................... 170
Timer Interconnect Configurations ........................... 170
Selection and the FOSC2 Configuration Bit ............... 35
Selection Using OSCCON Register ........................... 35
16 x 16 Signed Multiply Routine .............................. 108
16 x 16 Unsigned Multiply Routine .......................... 108
8 x 8 Signed Multiply Routine .................................. 107
8 x 8 Unsigned Multiply Routine .............................. 107
Changing Between Capture Prescalers ................... 171
Computed GOTO Using an Offset Value ................... 65
Erasing Flash Program Memory ................................ 90
Fast Register Stack .................................................... 65
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock Using a
Initializing PORTA .................................................... 126
Initializing PORTB .................................................... 128
Initializing PORTC .................................................... 131
Initializing PORTD .................................................... 134
Initializing PORTE .................................................... 137
Initializing PORTF .................................................... 140
Initializing PORTG ................................................... 142
Initializing PORTH .................................................... 144
Initializing PORTJ .................................................... 146
Loading the SSP1BUF (SSP1SR) Register ............. 196
Reading a Flash Program Memory Word .................. 89
Saving STATUS, WREG and BSR
Writing to Flash Program Memory ............................. 92
Indirect Addressing ............................................ 78
Timer1 Interrupt Service .................................. 159
Registers in RAM ............................................. 124
Comparator ...................................................................... 271
Comparator Specifications ............................................... 361
Comparator Voltage Reference ....................................... 277
Compare (CCP Module) .................................................. 172
Compare (ECCP Module) ................................................ 180
Computed GOTO ............................................................... 65
Configuration Bits ............................................................ 281
Configuration Register Protection .................................... 292
Core Features
CPFSEQ .......................................................................... 310
CPFSGT .......................................................................... 311
CPFSLT ........................................................................... 311
Crystal Oscillator/Ceramic Resonator ................................ 31
Customer Change Notification Service ............................ 405
Customer Notification Service ......................................... 405
Customer Support ............................................................ 405
D
Data Addressing Modes .................................................... 78
Data Memory ..................................................................... 68
Analog Input Connection Considerations ................ 275
Associated Registers ............................................... 275
Configuration ........................................................... 272
Effects of a Reset .................................................... 274
Interrupts ................................................................. 274
Operation ................................................................. 273
Operation During Sleep ........................................... 274
Outputs .................................................................... 273
Reference ................................................................ 273
Response Time ........................................................ 273
Accuracy and Error .................................................. 278
Associated Registers ............................................... 279
Configuring .............................................................. 277
Connection Considerations ...................................... 278
Effects of a Reset .................................................... 278
Operation During Sleep ........................................... 278
Associated Registers ............................................... 173
CCPRx Register ...................................................... 172
Pin Configuration ..................................................... 172
Software Interrupt .................................................... 172
Timer1/Timer3 Mode Selection ................................ 172
Special Event Trigger .............................. 165, 180, 268
Easy Migration ............................................................. 6
Expanded Memory ....................................................... 5
Extended Instruction Set ............................................. 5
External Memory Bus .................................................. 5
nanoWatt Technology .................................................. 5
Oscillator Options and Features .................................. 5
Comparing Addressing Modes with
Direct ......................................................................... 78
Indexed Literal Offset ................................................ 81
Indirect ....................................................................... 78
Inherent and Literal .................................................... 78
Access Bank .............................................................. 71
Bank Select Register (BSR) ...................................... 68
Extended Instruction Set ........................................... 81
General Purpose Registers ....................................... 71
External Signal ................................................ 273
Internal Signal .................................................. 273
the Extended Instruction Set Enabled ............... 82
BSR ................................................................... 83
Instructions Affected .......................................... 81
Mapping Access Bank ....................................... 83
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