PIC18F66J15-I/PT Microchip Technology, PIC18F66J15-I/PT Datasheet - Page 134

• Manufacturer Part Number: PIC18F66J15-I/PT
• Description: IC PIC MCU FLASH 48KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J15-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 96KB (48K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10 FAMILY
TABLE 11-7:
DS39663F-page 132
RC0/T1OSO/
T13CKI
RC1/T1OSI/
ECCP2/P2A
RC2/ECCP1/
P1A
RC3/SCK1/
SCL1
RC4/SDI1/
SDA1
RC5/SDO1
RC6/TX1/CK1
RC7/RX1/DT1
Legend:
Note 1:
Pin Name
PWR = Power Supply, O = Output, I = Input, I
put, ST = Schmitt Buffer Input, TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden
for this option).
Default assignment for ECCP2/P2A when the CCP2MX Configuration bit is set.
ECCP2
Function
T1OSO
T13CKI
ECCP1
T1OSI
P2A
SCK1
SDA1
SDO1
SCL1
SDI1
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
P1A
TX1
CK1
RX1
DT1
PORTC FUNCTIONS
(1)
(1)
Setting
TRIS
0
1
x
1
0
1
x
0
1
0
0
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1
0
1
0
0
1
1
1
1
0
1
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O Type
I
I
2
2
C/SMB
C/SMB
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
2
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output; enabled when Timer1 oscillator enabled. Disables
digital I/O.
Timer1/Timer3 counter input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input; enabled when Timer1 oscillator enabled. Disables
digital I/O.
CCP2 compare output and CCP2 PWM output; takes priority over port data.
CCP2 capture input.
ECCP2 Enhanced PWM output, Channel A. May be configured for tri-state
during Enhanced PWM shutdown events. Takes priority over port data.
LATC<2> data output.
PORTC<2> data input.
CCP1 compare output and CCP1 PWM output; takes priority over port data.
CCP1 capture input.
ECCP1 Enhanced PWM output, Channel A. May be configured for tri-state
during Enhanced PWM shutdown events. Takes priority over port data.
LATC<3> data output.
PORTC<3> data input.
SPI clock output (MSSP1 module); takes priority over port data.
SPI clock input (MSSP1 module).
I
I
LATC<4> data output.
PORTC<4> data input.
SPI data input (MSSP1 module).
I
I
LATC<5> data output.
PORTC<5> data input.
SPI data output (MSSP1 module); takes priority over port data.
LATC<6> data output.
PORTC<6> data input.
Synchronous serial data output (EUSART1 module); takes priority over port data.
Synchronous serial data input (EUSART1 module). User must configure as
an input.
Synchronous serial clock input (EUSART1 module).
LATC<7> data output.
PORTC<7> data input.
Asynchronous serial receive data input (EUSART1 module).
Synchronous serial data output (EUSART1 module); takes priority over port
data.
Synchronous serial data input (EUSART1 module). User must configure as
an input.
C™/SMB = I
2
2
2
2
C™ clock output (MSSP1 module); takes priority over port data.
C clock input (MSSP1 module); input type depends on module setting.
C data output (MSSP1 module); takes priority over port data.
C data input (MSSP1 module); input type depends on module setting.
2
C/SMBus input buffer, ANA = Analog Signal, DIG = Digital Out-
Description
© 2009 Microchip Technology Inc.