PIC18F66J15-I/PT Microchip Technology, PIC18F66J15-I/PT Datasheet - Page 241

• Manufacturer Part Number: PIC18F66J15-I/PT
• Description: IC PIC MCU FLASH 48KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J15-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 96KB (48K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.0
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of two
serial I/O modules. (Generically, the EUSART is also
known as a Serial Communications Interface or SCI.)
The EUSART can be configured as a full-duplex
asynchronous system that can communicate with
peripheral devices, such as CRT terminals and
personal computers. It can also be configured as a
half-duplex synchronous system that can communicate
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs, etc.
The Enhanced USART module implements additional
features, including automatic baud rate detection and
calibration, automatic wake-up on Sync Break recep-
tion and 12-bit Break character transmit. These make it
ideally suited for use in Local Interconnect Network bus
(LIN bus) systems.
All members of the PIC18F87J10 family are equipped
with two independent EUSART modules, referred to as
EUSART1 and EUSART2. They can be configured in
the following modes:
• Asynchronous (full duplex) with:
• Synchronous – Master (half duplex) with
• Synchronous – Slave (half duplex) with selectable
© 2009 Microchip Technology Inc.
- Auto-Wake-up on character reception
- Auto-Baud calibration
- 12-bit Break character transmission
selectable clock polarity
clock polarity
ENHANCED UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
PIC18F87J10 FAMILY
The pins of EUSART1 and EUSART2 are multiplexed
with the functions of PORTC (RC6/TX1/CK1 and
RC7/RX1/DT1) and PORTG (RG1/TX2/CK2 and
RG2/RX2/DT2), respectively. In order to configure
these pins as an EUSART:
• For EUSART1:
• For EUSART2:
The operation of each Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTAx)
• Receive Status and Control (RCSTAx)
• Baud Rate Control (BAUDCONx)
These are detailed on the following pages in
Register 20-1,
respectively.
- bit, SPEN (RCSTA1<7>), must be set (= 1)
- bit, TRISC<7>, must be set (= 1)
- bit, TRISC<6>, must be cleared (= 0) for
- bit, TRISC<6>, must be set (= 1) for
- bit, SPEN (RCSTA2<7>), must be set (= 1)
- bit, TRISG<2>, must be set (= 1)
- bit, TRISG<1>, must be cleared (= 0) for
- bit, TRISC<6> must be set (= 1) for
Note:
Note:
Asynchronous and Synchronous Master
modes
Synchronous Slave mode
Asynchronous and Synchronous Master
modes
Synchronous Slave mode
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Throughout this section, references to
register and bit names that may be associ-
ated with a specific EUSART module are
referred to generically by the use of ‘x’ in
place of the specific module number.
Thus, “RCSTAx” might refer to the
Receive
EUSART1 or EUSART2.
Register 20-2
Status
register
and
DS39663F-page 239
Register 20-3,
for
either