PIC18F66J15-I/PT Microchip Technology, PIC18F66J15-I/PT Datasheet - Page 11

• Manufacturer Part Number: PIC18F66J15-I/PT
• Description: IC PIC MCU FLASH 48KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F66J15-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 96KB (48K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 1-2:
© 2009 Microchip Technology Inc.
Note 1:
ECCP1
2:
OSC2/CLKO
OSC1/CLKI
ENVREG
See Table 1-4 for I/O port pin descriptions.
BOR functionality is provided when the on-board voltage regulator is enabled.
AD15:AD0, A19:A16
(Multiplexed with PORTD,
PORTE and PORTH)
ECCP2
10-Bit
ADC
Table Pointer<21>
PIC18F8XJ10/8XJ15 (80-PIN) BLOCK DIAGRAM
inc/dec logic
Instruction Bus <16>
Program Memory
Address Latch
Data Bus<8>
(128 Kbytes)
Data Latch
V
DDCORE
Generation
Reference
State Machine
Control Signals
Band Gap
Regulator
Precision
Oscillator
Voltage
21
Timing
INTRC
ECCP3
Timer0
/V
20
CAP
8
Timer1
CCP4
PCLATU
PCU
Program Counter
V
31 Level Stack
DD
Start-up Timer
ROM Latch
,
STKPTR
Brown-out
Table Latch
Instruction
Watchdog
Power-up
Oscillator
Power-on
Decode &
V
Reset
Control
SS
PCLATH
PCH
Reset
Timer
Timer
IR
8
Timer2
(2)
CCP5
MCLR
PCL
8
EUSART1
Timer3
PIC18F87J10 FAMILY
BSR
BITOP
4
3
Data Address<12>
8
Address Latch
Address
Decode
Data Memory
FSR0
FSR1
FSR2
inc/dec
EUSART2
Data Latch
logic
Timer4
(2.0, 3.9
PRODH
Kbytes)
8
ALU<8>
12
8 x 8 Multiply
W
12
Access
8
Bank
8
PRODL
4
12
Comparators
MSSP1
8
8
8
8
MSSP2
RA0:RA5
RC0:RC7
RD0:RD7
RE0:RE7
RF1:RF7
RB0:RB7
RG0:RG4
RH0:RH7
RJ0:RJ7
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
PORTH
PORTJ
DS39663F-page 9
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