MT48H8M32LFB5-10 TR Micron Technology Inc, MT48H8M32LFB5-10 TR Datasheet - Page 71

IC SDRAM 256MBIT 100MHZ 90VFBGA

MT48H8M32LFB5-10 TR

Manufacturer Part Number
MT48H8M32LFB5-10 TR
Description
IC SDRAM 256MBIT 100MHZ 90VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H8M32LFB5-10 TR

Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (8Mx32)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 49: Single Write – With Auto Precharge
PDF: 09005aef80d460f2/Source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. G 6/05
COMMAND
A0–A9, A11
BA0, BA1
DQM 0-3
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
t CK
Notes: 1. For this example, BL = 1, and the WRITE burst is followed by a manual PRECHARGE.
T1
NOP 3
2. 15ns is required between <D
3. A9 and A11 = “Don’t Care.”
4. WRITE command not allowed else
t CL
quency.
See Table 15, Electrical Characteristics and Recommended AC Operating Conditions, on
page 48.
T2
NOP 3
t CH
T3
NOP 3
ENABLE AUTO PRECHARGE
t CMS
COLUMN m 2
t DS
BANK
WRITE
T4
D
IN
t CMH
m
t DH
71
IN
m> and the PRECHARGE command, regardless of fre-
t WR
T5
t
NOP
RAS would be violated.
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T6
NOP
256Mb: x32 Mobile SDRAM
T7
NOP
t RP
©2003 Micron Technology, Inc. All rights reserved.
BANK
ROW
ROW
Timing Diagrams
T8
ACTIVE
T9
NOP
DON’T CARE

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