MT48H8M32LFB5-10 TR Micron Technology Inc, MT48H8M32LFB5-10 TR Datasheet - Page 21

• Manufacturer Part Number: MT48H8M32LFB5-10 TR
• Description: IC SDRAM 256MBIT 100MHZ 90VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H8M32LFB5-10 TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 90-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operation
Bank/Row Activation
Figure 6: Activating a Specific Row in a Specific Bank
PDF: 09005aef80d460f2/Source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. G 6/05
Before any READ or WRITE commands can be issued to a bank within the SDRAM, a row
in that bank must be “opened.” This is accomplished via the ACTIVE command, which
selects both the bank and the row to be activated (see Figure 5 on page 15).
After opening a row (issuing an ACTIVE command), a READ or WRITE command may be
issued to that row, subject to the
the clock period and rounded up to the next whole number to determine the earliest
clock edge after the ACTIVE command on which a READ or WRITE command can be
entered. For example, a
results in 2.5 clocks, rounded to 3. This is reflected in Figure 6 on page 21, which covers
any case where 2 <
specification limits from time units to clock cycles.)
A subsequent ACTIVE command to a different row in the same bank can only be issued
after the previous active row has been “closed” (precharged). The minimum time inter-
val between successive ACTIVE commands to the same bank is defined by
A subsequent ACTIVE command to another bank can be issued while the first bank is
being accessed, which results in a reduction of total row-access overhead. The mini-
mum time interval between successive ACTIVE commands to different banks is defined
by
t
RRD.
t
RCD (MIN)/
BA0, BA1
A0-A11
t
RCD specification of 20ns with a 125 MHz clock (8ns period)
RAS#
CAS#
WE#
CKE
CLK
CS#
21
t
HIGH
CK ≤ 3. (The same procedure is used to convert other
t
RCD specification.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ADDRESS
ADDRESS
BANK
ROW
256Mb: x32 Mobile SDRAM
t
RCD (MIN) should be divided by
DON´T CARE
©2003 Micron Technology, Inc. All rights reserved.
t
Operation
RC.