MT48H8M32LFB5-10 TR Micron Technology Inc, MT48H8M32LFB5-10 TR Datasheet - Page 22

• Manufacturer Part Number: MT48H8M32LFB5-10 TR
• Description: IC SDRAM 256MBIT 100MHZ 90VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H8M32LFB5-10 TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 90-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 7: Example: Meeting
READs
PDF: 09005aef80d460f2/Source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. G 6/05
READ bursts are initiated with a READ command, as shown in Figure 8.
The starting column and bank addresses are provided with the READ command, and
auto precharge is either enabled or disabled for that burst access. If auto precharge is
enabled, the row being accessed is precharged at the completion of the burst. For the
generic READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address will
be available following the CAS latency after the READ command. Each subsequent data-
out element will be valid by the next positive clock edge. Figure 9 shows general timing
for each possible CAS latency setting.
t
COMMAND
RCD (MIN) When 2 <
CLK
ACTIVE
T0
22
t CK
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
RCD (MIN)
T1
t
RCD (MIN)/
t CK
NOP
256Mb: x32 Mobile SDRAM
T2
t
t CK
CK < 3
©2003 Micron Technology, Inc. All rights reserved.
READ or
DON’T CARE
WRITE
T3
Operation