MT48H8M32LFB5-10 TR Micron Technology Inc, MT48H8M32LFB5-10 TR Datasheet - Page 43

IC SDRAM 256MBIT 100MHZ 90VFBGA

MT48H8M32LFB5-10 TR

Manufacturer Part Number
MT48H8M32LFB5-10 TR
Description
IC SDRAM 256MBIT 100MHZ 90VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H8M32LFB5-10 TR

Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (8Mx32)
Speed
100MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PDF: 09005aef80d460f2/Source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. G 6/05
10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with
11. Does not affect the state of the bank and acts as a NOP to that bank.
5. The following states must not be interrupted by any executable command; COMMAND
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid
9. This command is BURST TERMINATE when CKE is HIGH and DEEP POWER DOWN when CKE
INHIBIT or NOP commands must be applied on each positive clock edge during these
states.
Refreshing: Starts with registration of an AUTO REFRESH command and ends when
met. Once
Accessing mode register: Starts with registration of a LOAD MODE REGISTER command
and ends when
idle state.
Precharging all: Starts with registration of a PRECHARGE ALL command and ends when
is met. Once
state for precharging.
is LOW.
auto precharge enabled and READs or WRITEs with auto precharge disabled.
t
RC is met, the SDRAM will be in the all banks idle state.
t
RP is met, all banks will be in the idle state.
t
MRD has been met. Once
43
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
MRD is met, the SDRAM will be in the all banks
256Mb: x32 Mobile SDRAM
©2003 Micron Technology, Inc. All rights reserved.
Truth Tables
t
RC is
t
RP

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