RF6001_1 RFMD [RF Micro Devices], RF6001_1 Datasheet - Page 59

• Manufacturer Part Number: RF6001_1
• Description: FRACTIONAL-N RF SYNTHESIZER WITH MODULATOR AND DIGITAL IF FILTER
• Manufacturer: RFMD [RF Micro Devices]

PLL Register x2 (PLLx2) - Address 000111
TX Modulation Register (TXMOD) - Address 001000
PA Ramp Register 1 (PARMP1) - Address 001001
PA Ramp Register 2 (PARMP2) - Address 001010
Rev A3 DS050929
PARMP2(15:14)
PARMP1(17:10)
PLLx2(15:11)
PARMP2(13:6)
PLLx2(17:16)
PLLx2(10:8)
TXMOD(13:8)
PARMP1(9:0)
PARMP2(5:0)
PARMP2(16)
PLLx2(5:0)
PARMP2(17)
PLLx2(7:6)
TXMOD(3:0)
TXMOD(7:4)
Location
TXMOD(17)
TXMOD(16)
TXMOD(15)
TXMOD(14)
Location
Location
Location
CT_MOFFS(2:0)
KV_DEF(5:0)
CT_DEF(4:0)
FBASE(1:0)
TX_THN(3:0)
Bit Name
TX_THP(3:0)
TXEND(5:0)
PHADJ(5:0)
TXENU(7:0)
Bit Name
Bit Name
Bit Name
CTN(1:0)
reserved
PAG(9:0)
reserved
PAT(7:0)
TXENIO
TX_INV
TX_DE
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at ([phone] or [e-mail].
TXAD
PAEN
Default
Default
Default
Default
3AEh
20h
9Ah
98h
00
3h
01
6h
0
0
0
0
0
0
0
0
1
1
0
Base Frequency
00=F
01=F
1x=F
See the OFFS register description for more information on setting the
VCO Coarse Tune Coefficient
VCO Coarse Tune Offset
VCO Coarse Tune Type
00=3 bits
01=4 bits (Internal VCO1 or External RF2722 VCO)
10=5 bits (Internal VCO2)
11=reserved
KV Calibration Setting
TX Interface Mode
0=analog TX interface
1=digital TX interface
reserved, program to zero (0)
Differential Encoder, used with digital TX interface
0=input data on MDI is not differentially encoded
1=input data on MDI is differentially encoded
Symbol Polarity after differential encoding
0=data is not inverted
1=data is inverted
Symbol Clock Phase Offset
offset=(PHADJ/13)
TX Analog Interface, positive threshold
TX
TX Analog Interface, negative threshold
TX
PA Ramp Delay, delay time from the rising edge on the TXST pin to the start of
PA Ramp Gain, used as a scaling factor on the PA Ramp Waveform
TXEN pin direction
0=TXEN is input
1=TXEN is output, generated by PA ramping system
PA Ramp Enable
0=disabled, DAC1 is controlled by DAC1EN and DAC1V
1=enabled, DAC1 is controlled by PA ramp control system, initiated by a rising
reserved, program to zero (0)
TXEN rising edge delay from TXST
TXEN falling edge delay from end of PA ramp
PLL/VCO frequency.
the ramp. Delay=PAT*(12/13)
Gain=(PAG/1024)
edge on TXEN or TXST pins
Delay=TXENU*(12/13)
Delay=TXEND*(12/13)
_
_
BASE
BASE
BASE
THP
THN
is 1664MHz
is 832MHz
is 0Hz
≈
≈
(
(
12.5 V
12.5 V
Part of the POLARIS™ TOTAL RADIO™ Solution
μ
s
⋅
⋅
PK
PK
μ
μ
s
s
)
)
–
–
2
2
μ
Function
Function
Function
Function
s.
RF6001
59 of 70