zl50118gag2 Zarlink Semiconductor, zl50118gag2 Datasheet - Page 14

• Manufacturer Part Number: zl50118gag2
• Description: 32 Channel 1 T1/e1 Cesop Processor With Single Ethernet Interface
• Manufacturer: Zarlink Semiconductor

ZL50116 Package view from TOP side. Note that ball A1 is non-chamfered corner.
AA
AB
W
M
A
B
C
D
G
H
K
N
R
U
E
F
L
P
T
V
Y
J
VDD_IO
NC
NC
NC
NC
NC
M_MDIO
M_MDC
NC
NC
GND
NC
NC
NC
NC
TDM_CLKI[
1]
TDM_STI[0]VDD_IO
TDM_STO[
0]
IC
IC
IC
VDD_IO
1
NC
VDD_IO
GND
NC
M0_GIGABI
T_LED
NC
DEVICE_ID
[0]
GND
NC
NC
AUX_CLKO AUX_CLKI VDD_COR
NC
NC
GND
TDM_STI[1]TDM_CLKI[
TDM_CLKO
[1]
TDM_CLKO
[0]
TDM_CLKI
_REF
GND
VDD_IO
IC
2
M0_TXCLK M0_RXD[7] M0_RXD[6] M0_RXD[4] M0_COL
GND
VDD_IO
NC
NC
DEVICE_ID
[1]
M0_LINKU
P_LED
NC
NC
NC
NC
NC
VDD_IO
0]
TDM_FRMI
_REF
GND
TDM_CLKO
_REF
TDM_FRM
O_REF
VDD_IO
GND
IC
3
NC
NC
VDD_IO
NC
VDD_COR
E
VDD_IO
VDD_COR
E
VDD_COR
E
VDD_IO
E
VDD_IO
VDD_COR
E
VDD_COR
E
TDM_STO[
1]
VDD_IO
TDM_CLKi
S
TDM_CLKi
P
VDD_IO
IC
VDD_IO
IC
4
NC
NC
NC
VDD_IO
IC
VDD_IO
GND
5
M0_CRS
NC
M0_RXER VDD_IO
VDD_COR
E
VDD_COR
E
IC
IC
Figure 3 - ZL50116 Package View and Ball Positions
6
M0_RXD[0] M0_RBC1 M0_RBC0 M0_TXER GND
M0_RXDV M0_RXD[3] M0_RXD[1] M0_RXCLK M0_TXD[7] M0_TXD[4] M0_TXD[0] VDD_IO
VDD_IO
IC
GND
IC
7
ZL50115/16/17/18/19/20
M0_GTX_C
LK
M0_RXD[5] VDD_COR
VDD_IO
IC
A1VDD_PL
L1
IC
8
M0_TXEN DEVICE_ID
E
GND
GND
GND
GND
GND
GND
VDD_COR
E
PLL_PRI
IC
GPIO[0]
Zarlink Semiconductor Inc.
9
[4]
M0_RXD[2] M0_REFCL
GND
GND
GND
GND
GND
GND
PLL_SEC
IC
IC
GPIO[3]
10
CPU_DATA[
28]
K
GND
GND
GND
GND
GND
GND
IC_GND
IC_GND
SYSTEM_D
EBUG
GPIO[4]
14
11
CPU_DATA[
24]
M0_TXD[5] M0_TXD[3] M0_TXD[2] NC
M0_TXD[6] M0_TXD[1] VDD_COR
GND
GND
GND
GND
GND
GND
GND
IC
SYSTEM_R
ST
GPIO[5]
12
GND
GND
GND
GND
GND
GND
GND
SYSTEM_C
LK
GND
GPIO[1]
GPIO[6]
13
CPU_DATA[
23]
E
GND
GND
GND
GND
GND
GND
VDD_COR
E
GND
GPIO[2]
GPIO[10]
14
GND
VDD_IO
VDD_COR
E
GPIO[9]
GPIO[8]
GPIO[7]
GPIO[11]
15
CPU_DATA[
19]
CPU_DATA[
27]
CPU_DATA[
31]
VDD_IO
VDD_IO
GPIO[14]
GPIO[12]
GPIO[13]
16
CPU_DATA[
12]
CPU_DATA[
22]
NC
M0_ACTIV
E_LED
GPIO[15]
TEST_MOD
E[1]
TEST_MOD
E[0]
TEST_MOD
E[2]
17
CPU_DATA[
9]
CPU_DATA[
20]
CPU_DATA[
29]
VDD_COR
E
DEVICE_ID
[2]
JTAG_TRS
T
JTAG_TDI IC_GND
IC_GND
18
CPU_DATA[
8]
CPU_DATA[
13]
CPU_DATA[
26]
VDD_IO
CPU_DATA[
30]
VDD_COR
E
VDD_IO
CPU_DATA[
10]
VDD_COR
E
GND
CPU_CLK GND
GND
VDD_IO
VDD_COR
E
GND
VDD_IO
VDD_COR
E
DEVICE_ID
[3]
VDD_IO
IC_GND
CPU_ADD
R[2]
19
CPU_DATA[
7]
GND
VDD_IO
CPU_DATA[
25]
CPU_DATA[
21]
CPU_DATA[
18]
CPU_IREQ
1
CPU_DATA[
1]
CPU_DATA[
5]
CPU_DATA[
2]
CPU_TS_A
LE
CPU_ADD
R[22]
CPU_ADD
R[17]
CPU_ADD
R[11]
VDD_IO
JTAG_TMS CPU_ADDR
JTAG_TCK CPU_ADDR
JTAG_TDO CPU_ADDR
VDD_IO
GND
CPU_ADD
R[3]
Data Sheet
20
CPU_SDAC
K1
VDD_IO
GND
CPU_ADDR
[23]
CPU_DATA[
15]
CPU_DATA[
17]
CPU_DATA[
11]
CPU_DATA[
4]
CPU_DATA[
3]
IC
CPU_SDAC
K2
CPU_WE
CPU_CS
CPU_ADDR
[18]
CPU_ADDR
[13]
CPU_ADDR
[14]
[15]
[10]
[4]
GND
VDD_IO
CPU_ADDR
[5]
21
VDD_IO
CPU_TA
CPU_DRE
Q1
CPU_DATA[
6]
CPU_DATA[
14]
CPU_DATA[
16]
CPU_DATA[
0]
IC
CPU_IREQ
0
CPU_DRE
Q0
IC_VDD_IO
CPU_OE
CPU_ADDR
[19]
CPU_ADDR
[21]
CPU_ADDR
[20]
CPU_ADDR
[16]
CPU_ADDR
[12]
CPU_ADDR
[9]
CPU_ADDR
[8]
CPU_ADDR
[7]
CPU_ADDR
[6]
VDD_IO
22