PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 40

handler, the transceiver (TRAN), the synchronous transfer (ST) and the auxiliary

interrupts (AUXI).

All these interrupt sources are described in the corresponding chapters. After the device

has requested an interrupt activating the interrupt pin (INT), the host must read first the

device interrupt status register (ISTA) in the associated interrupt service routine. The

interrupt pin of the device remains active until all interrupt sources are cleared by reading

the corresponding interrupt register. Therefore it is possible that the interrupt pin is still

active when the interrupt service routine is finished.

Each interrupt indication of the interrupt status registers can selectively be masked by

setting the respective bit in the MASK register.

For some interrupt controllers or hosts it might be necessary to generate a new edge on

the interrupt line to recognize pending interrupts. This can be done by masking all

interrupts at the end of the interrupt service routine (writing FF

into the MASK register)

and write back the old mask to the MASK register.

Data Sheet

2003-01-30