PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 138

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PEB3086HV14XP

Manufacturer Part Number
PEB3086HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB3086HV14XP

Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
microcontroller as master. The control of the data transfer between the CPU and the
ISAC-SX is handled via interrupts (ISAC-SX ® Host) and commands (Host ® ISAC-
SX).
There are three different interrupt indications in the ISTAx registers concerned with the
reception of data:
– RPF (Receive Pool Full) interrupt, indicating that a data block of the selected length
– RME (Receive Message End) interrupt, indicating that the reception of one message
– RFO (Receive Frame Overflow) interrupt, indicating that a complete frame could not
There are two control commands that are used with the reception of data:
– RMC (Receive Message Complete) command, telling the ISAC-SX that a data block
– RRES (Receiver Reset) command, resetting the HDLC receiver and clearing the
Note: The significant interrupts and commands are underlined as only these are
The following description of the receive FIFO operation is illustrated in
RFIFOx block size (threshold) of 16 and 32 bytes.
The RFIFOx requests service from the microcontroller by setting a bit in the ISTAx
register, which causes an interrupt (RPF, RME, RFO). The microcontroller then reads
status information (RBCHx,RBCLx), data from the RFIFOx and then may change the
receive FIFO block size (EXMx.RFBS). A block transfer is completed by the
microcontroller via a receive message complete (CMDRx.RMC) command. This causes
the space of the transferred bytes being released for new data and in case the frame was
complete (RME) the reset of the receive byte counter RBC (RBCHx,RBCLx)
1)
Data Sheet
(EXMx.RFBS) can be read from RFIFOx. The message which is currently received
exceeds the block size so further blocks will be received to complete the message.
is completed, i.e. either
• a short message is received
(message length £ the defined block size (EXMx.RFBS)) or
• the last part of a long message is received
(message length > the defined block size (EXMx.RFBS))
and is stored in the RFIFOx.
be stored in RFIFOx and is therefore lost as the RFIFOx is occupied. This occurs if
the host fails to respond quickly enough to RPF/RME interrupts since previous data
was not read by the host.
has been read from the RFIFOx and the corresponding FIFO space can be released
for new receive data.
receive FIFO of any data (e.g. used before start of reception). It has to be used after
a change of the message transfer mode. Pending interrupt indications of the receiver
are not cleared by RRES, but have to be cleared by reading these interrupts.
If RMC is omitted, then no new interrupt can be generated.
commonly used during a normal reception sequence.
138
Description of Functional Blocks
Figure 72
PEB 3086
1)
2003-01-30
ISAC-SX
.
for a

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