PEB3086HV14XP Infineon Technologies, PEB3086HV14XP Datasheet - Page 34

• Manufacturer Part Number: PEB3086HV14XP
• Manufacturer: Infineon Technologies

Specifications of PEB3086HV14XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

3.2.1.1
The basic structure of a read/write access to the ISAC-SX registers via the serial control
interface is shown in
Figure 6
A new programming sequence starts with the transfer of a header byte. The header byte
specifies different programming sequences allowing a flexible and optimized access to
the individual functional blocks of the ISAC-SX.
The possible sequences for access to the complete address range 00
Table 4
Table 4
Header
Byte
40
48
43
41
49
Note: In order to access the address range 00
Data Sheet
write sequence:
read sequence:
H
H
H
H
H
/44
/4C
/47
/45
/4D
SDR
SDR
SDX
to ’0’ (header bytes 40
must be set to ’1’ (header bytes 44
H
H
H
H
H
and described after that.
Programming Sequences
Sequence
Adr-Data-Adr-Data
Adr-Data-Data-Data
7
7
Serial Control Interface Timing
Header Byte Code
Figure
header
header
H
6.
, 48
H
0 7 6
0 7 6
, 43
write
read
0
1
Sequence Type
Alternating Read/Write (non-interleaved)
Alternating Read/Write (interleaved)
Read-only/Write-only (constant address)
Read and following Write-only (non-interleaved)
Read and following Write-only (interleaved)
H
, 41
H
, 4C
byte 2
34
H
address
byte 2
address
, 49
H
H
-7F
, 47
H
), and for the addresses 80
H
H
Description of Functional Blocks
bit 2 of the header byte must be set
, 45
0 7
0 7
H
, 4D
H
write data
read data
).
byte 3
byte 3
H
-7F
H
PEB 3086
are listed in
0
0
H
2003-01-30
ISAC-SX
-FF
H
bit 2