FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 422

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FW82801DBM S L6DN

Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801DBM S L6DN

Lead Free Status / RoHS Status
Not Compliant
USB UHCI Controllers Registers
11.1.7
11.1.8
11.1.9
422
SCC—Sub Class Code Register (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
BCC—Base Class Code Register (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
HTYPE—Header Type Register (USB—D29:F0/F1/F2)
Address Offset:
Default Value:
For functions 1 and 2, this register is hard-wired to 00h. For function 0, bit 7 is determined by the
values in bits 15, 10, and 9 of the function disable register (D31:F0:F2h).
7:0
7:0
6:0
Bit
Bit
Bit
7
Sub Class Code — RO.
03h = Universal Serial Bus Host Controller.
Base Class Code — RO.
0Ch = Serial Bus Controller.
Multi-Function Bit — RO. When set to 1, this bit indicates to software that this is a multi-function
device. A 0 indicates a single-function device. Since the upper functions in this device can be
individually hidden, this bit must be based on the function-disable bits in Device 31, Function 0,
Offset F2h as follows:
D29:F7_Disable
Header Type — RO. Hardwired to 00h, which indicates the standard PCI configuration layout.
(bit 15)
0
X
X
1
0Ah
03h
0Bh
0Ch
0Eh
FN 0: 80h
FN 1: 00h
FN 2: 00h
D29:F2_Disable
(bit 10)
X
1
0
X
D29:F1_Disable
Description
Description
Description
(bit 9)
1
X
X
0
Attribute:
Attribute:
Attribute:
Size:
Size:
Size:
Intel
Multi-Function Bit
®
82801DBM ICH4-M Datasheet
1
1
1
0
RO
8 bits
RO
8 bits
RO
8 bits

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