FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 29

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Intel
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82801DBM ICH4-M Datasheet
9-7
9-8
9-9
9-10
9-11
9-12
10-1
10-2
11-1
11-2
11-3
12-1
12-2
12-3
12-4
13-1
13-2
14-1
14-2
14-3
15-1
15-2
15-3
16-1
17-1
17-2
17-3
17-4
17-5
17-6
17-7
17-8
17-9
17-10
17-11
17-12
17-13
17-14
17-15
17-16
17-18
17-17
17-19
17-20
19-1
19-2
19-3
19-4
RTC (Standard) RAM Bank .........................................................................354
PCI Configuration Map (PM—D31:F0) ........................................................361
APM Register Map.......................................................................................368
ACPI and Legacy I/O Register Map.............................................................369
TCO I/O Register Map .................................................................................389
Registers to Control GPIO ...........................................................................396
PCI Configuration Register Address Map (IDE—D31:F1) ...........................401
Bus Master IDE I/O Registers......................................................................414
PCI Configuration Register Address Map (USB—D29:F0/F1/F2) ...............419
USB I/O Registers........................................................................................427
Run/Stop, Debug Bit Interaction SWDBG (Bit 5), Run/Stop (Bit 0)
Operation .....................................................................................................429
USB EHCI PCI Configuration Register Address Map (D29:F7)...................437
Enhanced Host Controller Capability Registers...........................................453
Enhanced Host Controller Operational Registers ........................................456
Debug Port Register Address Map ..............................................................468
SMBus Controller PCI Configuration Register Address Map
(SMBUS—D31:F3) ......................................................................................473
SMB I/O Registers .......................................................................................478
AC ‘97 Audio PCI Configuration Register Address Map (Audio—D31:F5) ..489
Intel
Native Audio Bus Master Control Registers.................................................503
AC ‘97 Modem Controller PCI Configuration Register Address Map
(Modem—D31:F6) .......................................................................................515
Intel
Modem Registers.........................................................................................524
Intel
DC Current Characteristics ..........................................................................542
DC Characteristic Input Signal Association .................................................542
DC Input Characteristics ..............................................................................543
DC Characteristic Output Signal Association...............................................545
DC Output Characteristics ...........................................................................546
Other DC Characteristics .............................................................................547
AC Input Characteristics ..............................................................................548
Clock Timings ..............................................................................................548
PCI Interface Timing ....................................................................................551
IDE PIO and Multiword DMA ModeTiming...................................................552
Ultra ATA Timing (Mode 0, Mode 1, Mode 2) ..............................................553
Ultra ATA Timing (Mode 3, Mode 4, Mode 5) ..............................................555
Universal Serial Bus Timing.........................................................................557
IOAPIC Bus Timing......................................................................................559
SMBus Timing..............................................................................................559
AC’97 Timing ...............................................................................................560
Miscellaneous Timings.................................................................................561
LPC Timing ..................................................................................................561
Power Sequencing and Reset Signal Timings.............................................562
Power Management Timings .......................................................................563
Test Mode Selection ....................................................................................579
XOR Test Pattern Example..........................................................................580
XOR Chain 1 ...............................................................................................581
XOR Chain 2 ...............................................................................................582
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ICH4 Audio Mixer Register Configuration ..........................................501
ICH4 Modem Mixer Register Configuration .......................................523
ICH4 Ball List .....................................................................................536
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