FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 257
FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
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Intel
®
82801DBM ICH4-M Datasheet
The ICH4 contains registers that are located in the processor’s I/O space and memory space and
sets of PCI configuration registers that are located in PCI configuration space. This chapter
describes the ICH4 I/O and memory maps at the register-set level. Register access is also
described. Register-level address maps and Individual register bit descriptions are provided in the
following chapters. The following notations and definitions are used in the register/instruction
description chapters.
RO
WO
R/W
R/WC
R/WO
Default
Bold
Register and Memory Mapping
no effect. However, in other cases, two separate registers are located at the same
location where a read accesses one of the registers and a write accesses the other
register. See the I/O and memory map tables for details.
no effect. However, in other cases, two separate registers are located at the same
location where a read accesses one of the registers and a write accesses the other
register. See the I/O and memory map tables for details.
a write of 1 clears (sets to 0) the corresponding bit and a write of 0 has no effect.
up. After the first write, the bit becomes read only.
state represents the minimum functionality feature set required to successfully bring up
the system. Hence, it does not represent the optimal system configuration. It is the
responsibility of the system initialization software to determine configuration,
operating parameters, and optional system features that are applicable, and to program
the ICH4 registers accordingly.
ICH4. Register bits that are not implemented or are hardwired will remain in plain text.
Read Only. In some cases, If a register is read only, writes to this register location have
Write Only. In some cases, If a register is write only, reads to this register location have
Read/Write. A register with this attribute can be read and written.
Read/Write Clear. A register bit with this attribute can be read and written. However,
Read/Write-Once. A register bit with this attribute can be written only once after power
When ICH4 is reset, it sets its registers to predetermined default states. The default
Register bits that are highlighted in bold text indicate that the bit is implemented in the
Register and Memory Mapping
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