WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 85

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

• Lead Free Status / RoHS Status: Compliant

Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 52. Status Register #2 - Address 17, Hex 11
Table 52
1. RO = Read Only. R/W = Read/Write
17.15
17.14
17.13
17.12
17.11
17.10
17.9
17.8
17.7
17.6
17.5
17.4
17:3
17:2
17:1
17.0
Bit
lists register #2 status bits.
Reserved
10/100 Mode
Transmit Status
Receive Status
Collision Status
Link
Duplex Mode
Auto-Negotiation
Auto-Negotiation
Complete
Reserved
Polarity
Pause
Error
Reserved
Reserved
Reserved
Name
Intel
Always 0.
0 = LXT972M Transceiver is not operating
1 = LXT972M Transceiver is operating in
0 = LXT972M Transceiver is not transmitting a
1 = LXT972M Transceiver is transmitting a
0 = LXT972M Transceiver is not receiving a
1 = LXT972M Transceiver is receiving a packet.
0 = No collision.
1 = Collision is occurring.
0 = Link is down.
1 = Link is up.
0 = Half-duplex.
1 = Full-duplex.
0 = LXT972M Transceiver is in manual mode.
1 = LXT972M Transceiver is in auto-negotiation
0 = Auto-negotiation process not completed.
1 = Auto-negotiation process completed.
This bit is valid only when auto negotiate is
enabled. The value is equivalent to the value of
Register bit 1.5.
Always 0.
0 = Polarity is not reversed.
1 = Polarity is reversed.
NOTE: Polarity is not a valid status in 100 Mbps
0 = The LXT972M Transceiver is not Pause
1 = The LXT972M Transceiver is Pause capable.
0 = No error occurred
1 = Error occurred (Remote Fault, jabber, parallel
NOTE: The register bit is cleared when the
Always 0.
Always 0.
Always 0.
®
100BASE-TX mode.
100BASE-TX mode.
packet.
packet.
packet.
mode.
capable.
detect fault)
LXT972M Single-Port 10/100 Mbps PHY Transceiver
mode.
registers that generate the error condition
are read.
Description
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R
1
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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