WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 17

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

• Lead Free Status / RoHS Status: Compliant

Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 5.
Table 6.
Table 7.
Table 5
Intel
Table 6
Intel
Table 7
Intel
LQFP
LQFP
LQFP
Pin#
Pin#
Pin#
32
31
14
15
17
18
10
11
®
®
®
LXT972M Transceiver MII Controller Interface Signal Descriptions
LXT972M Transceiver Network Interface Signal Descriptions
LXT972M Transceiver Standard Bus and Interface Signal Descriptions
lists signal descriptions of the LXT972M Transceiver MII controller interface pins.
lists signal descriptions of the LXT972M Transceiver network interface pins.
lists signal descriptions of the LXT972M Transceiver standard bus and interface signals.
MDC
MDIO
TPOP
TPON
TPIP
TPIN
Symbol
Symbol
ADDR0
ADDR1
Symbol
Type
Type
AO
Type
AI
I
I/O
I
Twisted-Pair Outputs, Positive and Negative.
During 100BASE-TX or 10BASE-T operation, TPOP/N pins drive
IEEE 802.3 compliant pulses onto the line.
Twisted-Pair Inputs, Positive and Negative.
During 100BASE-TX or 10BASE-T operation, TPIP/N pins receive
differential 100BASE-TX or 10BASE-T signals from the line.
Address.
Set device address.
Management Data Clock.
Clock for the MDIO serial data channel.
Maximum frequency is 8 MHz.
Management Data Input/Output.
Bidirectional serial data channel for PHY/STA communication.
Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Signal Description
Signal Description
Signal Description
17