WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 11

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

• Lead Free Status / RoHS Status: Compliant

2.0
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Figure 1. Intel
LED/CFG[3:1]
ADDR[1:0]
RESET_L
RXD[3:0]
TXD[3:0]
RX_CLK
TX_CLK
RX_DV
RX_ER
TX_EN
MDIO
MDC
CRS
COL
Block Diagram for Intel
Figure 1
block diagram on the first page of this document. This copy of the block diagram appears here as a
convenience to the reader.)
®
Collision
Detect
LXT972M Transceiver Block Diagram
is a block diagram of the LXT972M Transceiver. (This block diagram is the same as the
Management /
Mode Select
Carrier Sense
Error Detect
Data Valid
Register
Logic
Set
Parallel/Serial
Converter
Register Set
Converter
Serial-to-
Parallel
Negotiation
Generator
100
10
Clock
Auto
Descrambler
Manchester
Decoder &
Intel
Decoder
Manchester
Scrambler
& Encoder
Encoder
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
100
10
OSP
Slicer
Select
Media
Shaper
®
OSP
Pulse
Generator
Clock
LXT972M Transceiver
Adaptive EQ with
Baseline Wander
Cancellation
OSP
TP
Driver
+
-
100TX
10BT
+
+
-
-
Power Supply
TP Out
JTAG
TP In
5
TDI
TDO
TMS
TCK
TRST_L
B3387-13
VCC
GND
REFCLK/XI
TPOP
TPON
TPIP
TPIN
XO
11