WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 58

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WJLXT972MLC.A4 S L7U9

Manufacturer Part Number
WJLXT972MLC.A4 S L7U9
Description
Manufacturer
Intel
Datasheet

Specifications of WJLXT972MLC.A4 S L7U9

Lead Free Status / RoHS Status
Compliant
Intel
58
Figure 19. Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Figure 19
connections crossed over for a Switch configuration.
Transceiver
®
LXT972M
1. Center tap current may be supplied from 3.3 V VCCA as shown. Additional power savings may be
2. The 100 Ω transmit load termination resistor typically required is integrated in the LXT972M
3. Magnetics without a receive pair center-tap do not require a 2 kV termination.
4. RJ-45 connections shown are for a standard switch application. For a standard NIC RJ-45 setup,
LXT972M Transceiver Typical Twisted-Pair Interface - Switch
Intel®
realized by supplying the center tap from a 2.5 V current source. A separate ferrite bead (rated at 50
mA) should be used to supply center tap current.
Transceiver.
see
shows the LXT972M Transceiver in a typical twisted-pair interface, with the RJ-45
Figure 20 on page
TPON
VCCA
TPOP
TPIN
TPIP
GND
0.1μF
270 pF 5%
270 pF 5%
0.1μF
2
59.
50Ω 1%
50Ω 1%
0.01 μF
.01μF
1
1:1
1:1
3
*
*
50 Ω
50 Ω
* = 0.001 μF / 2.0 kV
50 Ω
50 Ω
50 Ω
50 Ω
Document Number: 302875-005
Revision Date: 27-Oct-2005
B3515-02
RJ-45
1
2
3
4
5
6
7
8
4
Datasheet

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