WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 66

• Manufacturer Part Number: WJLXT972MLC.A4 S L7U9
• Manufacturer: Intel

Specifications of WJLXT972MLC.A4 S L7U9

• Lead Free Status / RoHS Status: Compliant

Intel
.
66
Figure 23. Intel
Table 31. Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Figure 23
TXD[3:0], TX_EN setup to TX_CLK
High
TXD[3:0], TX_EN hold from TX_CLK
High
TX_EN sampled to CRS asserted
TX_EN sampled to CRS de-asserted
TX_EN sampled to TPO out (Tx
latency)
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
testing.
rate. 100BASE-T bit time = 10
®
®
LXT972M Transceiver 100BASE-TX Transmit Timing Parameters
LXT972M Transceiver 100BASE-TX Transmit Timing
does not show the TX_ER signal.
Parameter
TXD[3:0]
Note: Timing diagram depicts 4B mode.
TXCLK
TX_EN
CRS
TPO
0ns
-8
s or 10 ns.
t5
t3
Symbol
t2
t1
t1
t2
t3
t4
t5
Min
5.3
12
20
24
0
Typ
–
–
–
–
–
1
250ns
t4
Max
5.7
24
28
–
–
Units
Document Number: 302875-005
BT
BT
BT
ns
ns
B3454-03
Revision Date: 27-Oct-2005
2
Test Conditions
Datasheet
–
–
–
–
–