MCF5272CVF66 Freescale Semiconductor, MCF5272CVF66 Datasheet - Page 358

• Manufacturer Part Number: MCF5272CVF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Not Compliant

Timer Module
15.3.2
Each TRR holds a 16-bit reference value that is compared with the free-running TCN as part of the output
compare function. A match occurs when TCN increments to equal TRR.
15.3.3
Each TCAP is used to latch the TCN value during a capture operation when an edge occurs on the
respective TIN0, TIN1, UART0_RxD, or UART1_RxD, as programmed in TMRn.
15.3.4
TCN registers are 16-bit up counters. Reading a TCNn gives the current counter value without affecting
counting. A write cycle to a TCN register causes it to be cleared.
15-4
Bits
0
Reset
Reset
Reset
Field
Field
Field
Addr
Addr
Addr
R/W
R/W
R/W
Name
RST
15
15
15
Timer Reference Registers (TRR0–TRR3)
Timer Capture Registers (TCAP0–TCAP3)
Timer Counters (TCN0–TCN3)
Reset timer.
0 A transition from 1 to 0 resets the timer. Other register values can be written. The counter/timer/prescaler
1 Enable timer
are not clocked unless the timer is enabled.
MCF5272 ColdFire
MBAR + 0x208 (TCAP0); 0x228 (TCAP1); 0x248 (TCAP2); 0x268 (TCAP3)
Figure 15-4. Timer Capture Registers (TCAP0–TCAP3)
Figure 15-3. Timer Reference Registers (TRR0–TRR3)
MBAR + 0x20C (TCN0); 0x22C (TCN1); 0x24C (TCN2); 0x26C (TCN3)
MBAR + 0x204 (TRR0); 0x224 (TRR1); 0x244 (TRR2); 0x264 (TRR3)
Table 15-1. TMRn Field Descriptions (continued)
Figure 15-5. Timer Counter (TCN0–TCN3)
®
Integrated Microprocessor User’s Manual, Rev. 3
COUNT (16-bit timer counter value)
CAP (16-bit capture counter value)
REF (16-bit reference value)
1111_1111_1111_1111
0000_0000_0000_0000
0000_0000_0000_0000
Read/Write
Read/Write
Read Only
Description
Freescale Semiconductor
0
0
0