DEMO9S08JM16 Freescale Semiconductor, DEMO9S08JM16 Datasheet - Page 15

• Manufacturer Part Number: DEMO9S08JM16
• Description: BOARD DEMO FOR JM16 FAMI
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08JM16

• Contents: Board with Daughter card, Cable, Documentation, Mini-AB USB Kit
• Processor To Be Evaluated: MC9S08JM16
• Data Bus Width: 8 bit
• Interface Type: USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: Flexis - S08JM
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08JM16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.5 Initialization/Application Information ..........................................................................................216
14.1 Introduction ...................................................................................................................................219
14.2 Register Definition ........................................................................................................................224
14.3 Functional Description ..................................................................................................................231
15.1 Introduction ...................................................................................................................................239
15.2 External Signal Description ..........................................................................................................244
15.3 Register Definition ........................................................................................................................245
15.4 Functional Description ..................................................................................................................252
Freescale Semiconductor
13.4.1 RTC Operation Example .................................................................................................215
14.1.1 Features ...........................................................................................................................221
14.1.2 Modes of Operation ........................................................................................................221
14.1.3 Block Diagram ................................................................................................................222
14.2.1 SCI Baud Rate Registers (SCIxBDH, SCIxBDL) ..........................................................224
14.2.2 SCI Control Register 1 (SCIxC1) ...................................................................................225
14.2.3 SCI Control Register 2 (SCIxC2) ...................................................................................226
14.2.4 SCI Status Register 1 (SCIxS1) ......................................................................................227
14.2.5 SCI Status Register 2 (SCIxS2) ......................................................................................229
14.2.6 SCI Control Register 3 (SCIxC3) ...................................................................................230
14.2.7 SCI Data Register (SCIxD) .............................................................................................231
14.3.1 Baud Rate Generation .....................................................................................................231
14.3.2 Transmitter Functional Description ................................................................................232
14.3.3 Receiver Functional Description ....................................................................................233
14.3.4 Interrupts and Status Flags ..............................................................................................235
14.3.5 Additional SCI Functions ...............................................................................................236
15.1.1 SPI Port Configuration Information ...............................................................................239
15.1.2 Features ...........................................................................................................................242
15.1.3 Modes of Operation ........................................................................................................242
15.1.4 Block Diagrams ..............................................................................................................242
15.2.1 SPSCK — SPI Serial Clock ............................................................................................244
15.2.2 MOSI — Master Data Out, Slave Data In ......................................................................245
15.2.3 MISO — Master Data In, Slave Data Out ......................................................................245
15.2.4 SS — Slave Select ..........................................................................................................245
15.3.1 SPI Control Register 1 (SPIxC1) ....................................................................................245
15.3.2 SPI Control Register 2 (SPIxC2) ....................................................................................246
15.3.3 SPI Baud Rate Register (SPIxBR) ..................................................................................248
15.3.4 SPI Status Register (SPIxS) ............................................................................................249
15.3.5 SPI Data Registers (SPIxDH:SPIxDL) ...........................................................................250
15.3.6 SPI Match Registers (SPIxMH:SPIxML) .......................................................................251
15.4.1 General ............................................................................................................................252
16-Bit Serial Peripheral Interface (S08SPI16V1)
Serial Communications Interface (S08SCIV4)
MC9S08JM16 Series Data Sheet, Rev. 2
Chapter 14
Chapter 15
15