C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 86

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
C8051F360/1/2/3/4/5/6/7/8/9
9.4.
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. There are 256 bytes of internal data
memory and 32k bytes (C8051F360/1/2/3/4/5/6/7) or 16k bytes (C8051F368/9) of internal program mem-
ory address space implemented within the CIP-51. The CIP-51 memory organization is shown in
Figure 9.2.
9.4.1. Program Memory
The CIP-51 core has a 64 kB program memory space. The C8051F360/1/2/3/4/5/6/7 implement 32 kB of
this program memory space as in-system, re-programmable Flash memory, organized in a contiguous
block from addresses 0x0000 to 0x7BFF. Addresses above 0x7BFF are reserved on the 32 kB devices.
The C8051F368/9 implement 16 kB of Flash from addresses 0x0000 to 0x3FFF.
Program memory is normally assumed to be read-only. However, the CIP-51 can write to program memory
by setting the Program Store Write Enable bit (PSCTL.0) and using the MOVX instruction. This feature pro-
vides a mechanism for the CIP-51 to update program code and use the program memory space for non-
volatile data storage. Refer to Section “13. Flash Memory” on page 135 for further details.
86
0x7BFF
0x7C00
0x3FFF
Memory Organization
0x0000
0x4000
0x0000
PROGRAM MEMORY
C8051F360/1/2/3/4/5/6/7
Programmable in 1024
Programmable in 1024
C8051F368/9
Byte Sectors)
Byte Sectors)
RESERVED
RESERVED
(In-System
(In-System
FLASH
FLASH
Figure 9.2. Memory Map
0xFFFF
0x03FF
0x0400
0x0000
Rev. 1.0
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
XRAM - 1024 Bytes
0x0000 to 0x03FF, wrapped
(accessable using MOVX
Same 1024 bytes as from
on 1024-byte boundaries
(Indirect Addressing
(Direct and Indirect
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
instruction)
Registers
Only)
DATA MEMORY
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's

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