C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 155

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
Bits 7–0: PGSEL[7:0]: XRAM Page Select Bits.
SFR Page:
SFR Address:
PGSEL7
R/W
Bit7
SFR Definition 15.1. EMI0CN: External Memory Interface Control
Signal Name
The XRAM Page Select Bits provide the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page of
RAM.
0x00: 0x0000 to 0x00FF
0x01: 0x0100 to 0x01FF
...
0xFE: 0xFE00 to 0xFEFF
0xFF: 0xFF00 to 0xFFFF
all pages
0xAA
PGSEL6
D0/A0
D1/A1
D2/A2
D3/A3
D4/A4
D5/A5
D6/A6
D7/A7
/WR
ALE
A10
A12
A13
A14
A15
/RD
A11
A8
A9
R/W
Bit6
Multiplexed Mode
PGSEL5
Table 15.1. EMIF Pinout (C8051F360/3)
R/W
Bit5
Port Pin
PGSEL4
P4.4
P4.5
P0.0
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
R/W
Bit4
C8051F360/1/2/3/4/5/6/7/8/9
PGSEL3
Rev. 1.0
R/W
Bit3
Signal Name
PGSEL2
/WR
ALE
/RD
A10
A11
A12
A13
A14
A15
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
R/W
Bit2
Non Multiplexed Mode
PGSEL1
R/W
Bit1
PGSEL0 00000000
Port Pin
R/W
Bit0
P4.4
P4.5
P0.0
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
Reset Value
155

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