C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 55

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
Bits 7–5: UNUSED. Read = 000b; Write = don’t care.
Bits 4–0: AMX0N4–0: AMUX0 Negative Input Selection.
SFR Page:
SFR Address:
Bit7
R
Note that when GND is selected as the Negative Input, ADC0 operates in Single-ended
mode. For all other Negative Input selections, ADC0 operates in Differential mode.
Notes:
all pages
0xBA
SFR Definition 5.2. AMX0N: AMUX0 Negative Channel Select
1. Only applies to C8051F361/2/6/7/8/9 (32-pin and 28-pin); selection
2. Only applies to C8051F360/1/6/8 (48-pin and 32-pin); selection RESERVED
Bit6
R
RESERVED on C8051F360 (48-pin) device.
on C8051F362/7/9 (28-pin) devices.
10101–11101
AMX0N4-0
00000
00001
00010
00011
10001
10010
10011
10100
00100
00101
01000
01001
01010
10000
00110
01011
01100
01101
00111
01110
01111
11110
Bit5
11111
R
(1)
(2)
(1)
(1)
(1)
(2)
(2)
(2)
AMX0N4 AMX0N3 AMX0N2 AMX0N1 AMX0N0 00000000
R/W
Bit4
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
R/W
Bit3
ADC0 Negative Input
R/W
Bit2
RESERVED
P1.0
P1.1
P1.2
P1.3
P3.1
P3.2
P3.3
P3.4
VREF
GND
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
R/W
Bit1
R/W
Bit0
Reset Value
55

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