C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 6

• Manufacturer Part Number: C8051F360DK
• Description: KIT DEV FOR C8051F360 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1410

C8051F360/1/2/3/4/5/6/7/8/9
19. UART0.................................................................................................................... 220
20. Enhanced Serial Peripheral Interface (SPI0)...................................................... 234
21. Timers.................................................................................................................... 247
6
18.3.SMBus Operation ........................................................................................... 203
18.4.Using the SMBus............................................................................................ 205
18.5.SMBus Transfer Modes.................................................................................. 213
18.6.SMBus Status Decoding................................................................................. 217
19.1.Enhanced Baud Rate Generation................................................................... 221
19.2.Operational Modes ......................................................................................... 222
19.3.Multiprocessor Communications .................................................................... 224
20.1.Signal Descriptions......................................................................................... 235
20.2.SPI0 Master Mode Operation ......................................................................... 236
20.3.SPI0 Slave Mode Operation ........................................................................... 238
20.4.SPI0 Interrupt Sources ................................................................................... 238
20.5.Serial Clock Timing......................................................................................... 239
20.6.SPI Special Function Registers ...................................................................... 241
21.1.Timer 0 and Timer 1 ....................................................................................... 248
21.2.Timer 2 .......................................................................................................... 256
21.3.Timer 3 .......................................................................................................... 260
18.3.1.Arbitration............................................................................................... 204
18.3.2.Clock Low Extension.............................................................................. 204
18.3.3.SCL Low Timeout................................................................................... 204
18.3.4.SCL High (SMBus Free) Timeout .......................................................... 205
18.4.1.SMBus Configuration Register............................................................... 206
18.4.2.SMB0CN Control Register ..................................................................... 209
18.4.3.Data Register ......................................................................................... 212
18.5.1.Master Transmitter Mode ....................................................................... 213
18.5.2.Master Receiver Mode ........................................................................... 214
18.5.3.Slave Receiver Mode ............................................................................. 215
18.5.4.Slave Transmitter Mode ......................................................................... 216
19.2.1.8-Bit UART ............................................................................................. 222
19.2.2.9-Bit UART ............................................................................................. 223
20.1.1.Master Out, Slave In (MOSI).................................................................. 235
20.1.2.Master In, Slave Out (MISO).................................................................. 235
20.1.3.Serial Clock (SCK) ................................................................................. 235
20.1.4.Slave Select (NSS) ................................................................................ 235
21.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 248
21.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 249
21.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 249
21.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 251
21.2.1.16-bit Timer with Auto-Reload................................................................ 256
21.2.2.8-bit Timers with Auto-Reload................................................................ 257
21.3.1.16-bit Timer with Auto-Reload................................................................ 260
21.3.2.8-bit Timers with Auto-Reload................................................................ 261
Rev. 1.0