C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 22

KIT DEV FOR C8051F360 FAMILY

C8051F360DK

Manufacturer Part Number
C8051F360DK
Description
KIT DEV FOR C8051F360 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F360DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F36x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1410
C8051F360/1/2/3/4/5/6/7/8/9
1.1.
1.1.1. Fully 8051 Compatible
The C8051F36x family utilizes Silicon Labs' proprietary CIP-51 microcontroller core. The CIP-51 is fully
compatible with the MCS-51™ instruction set; standard 803x/805x assemblers and compilers can be used
to develop software. The CIP-51 core offers all the peripherals included with a standard 8052, including
four 16-bit counter/timers, a full-duplex UART with extended baud rate configuration, an enhanced SPI
port, 1024 bytes of internal RAM, 128 byte Special Function Register (SFR) address space, and up to 39
I/O pins.
1.1.2. Improved Throughput
The CIP-51 employs a pipelined architecture that greatly increases its instruction throughput over the stan-
dard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system
clock cycles to execute with a maximum system clock of 12-to-24 MHz. By contrast, the CIP-51 core exe-
cutes 70% of its instructions in one or two system clock cycles, with only four instructions taking more than
four system clock cycles.
The CIP-51 has a total of 109 instructions. The table below shows the total number of instructions that
require each execution time.
With the CIP-51's maximum system clock at 100 MHz, it has a peak throughput of 100 MIPS. Figure 1.4
shows a comparison of peak throughputs for various 8-bit microcontroller cores with their maximum sys-
tem clocks.
22
Number of Instructions
Clocks to Execute
CIP-51™ Microcontroller Core
Figure 1.4. Comparison of Peak MCU Execution Speeds
25
20
15
10
5
26
1
(25 MHz clk)
Silicon Labs
CIP-51
50
2
(33 MHz clk)
2/3
PIC17C75x
Rev. 1.0
5
Microchip
14
3
(33 MHz clk)
3/4
Philips
80C51
7
4
3
(16 MHz clk)
ADuC812
8051
4/5
1
5
2
8
1

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