C8051F360DK Silicon Laboratories Inc, C8051F360DK Datasheet - Page 81

• Manufacturer Part Number: C8051F360DK
• Description: KIT DEV FOR C8051F360 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F360DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F36x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F360, F361, F362, F363, F364, F365, F366, F367, F368, F369
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1410

9.2.
A C2-based serial interface is provided for in-system programming of the Flash program memory and com-
munication with on-chip debug support logic. The re-programmable Flash can also be read and changed
by the application software using the MOVC and MOVX instructions. This feature allows program memory
to be used for non-volatile data storage as well as updating program code under software control.
The on-chip debug support logic facilitates full speed in-circuit debugging, allowing the setting of hardware
breakpoints and watch points, starting, stopping and single stepping through program execution (including
interrupt service routines), examination of the program's call stack, and reading/writing the contents of reg-
isters and memory. This method of on-chip debug is completely non-intrusive and non-invasive, requiring
no RAM, Stack, timers, or other on-chip resources.
The CIP-51 is supported by development tools from Silicon Labs and third party vendors. Silicon Labs pro-
vides an integrated development environment (IDE) including editor, macro assembler, debugger and pro-
grammer. The IDE's debugger and programmer interface to the CIP-51 via its C2 interface to provide fast
and efficient in-system device programming and debugging. Third party macro assemblers and C compil-
ers are also available.
Programming and Debugging Support
RESET
CLOCK
STOP
IDLE
ACCUMULATOR
PROGRAM COUNTER (PC)
CONTROL
Figure 9.1. CIP-51 Block Diagram
PSW
PRGM. ADDRESS REG.
LOGIC
POWER CONTROL
PC INCREMENTER
DATA POINTER
REGISTER
BUFFER
TMP1
PIPELINE
ALU
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
TMP2
DATA BUS
DATA BUS
D8
D8
D8
A16
D8
D8
D8
D8
B REGISTER
REGISTER
ADDRESS
INTERFACE
INTERFACE
INTERRUPT
INTERFACE
MEMORY
SRAM
SFR
BUS
MEM_WRITE_DATA
SFR_WRITE_DATA
MEM_READ_DATA
STACK POINTER
(256 X 8)
SFR_READ_DATA
SRAM
MEM_CONTROL
EMULATION_IRQ
MEM_ADDRESS
SFR_CONTROL
SFR_ADDRESS
SYSTEM_IRQs
81