DEMO9S08LC60 Freescale Semiconductor, DEMO9S08LC60 Datasheet - Page 191

• Manufacturer Part Number: DEMO9S08LC60
• Description: BOARD DEMO FOR 9S08LC60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08LC60

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08LC60
• Interface Type: RS-232, USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08LC
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.6.3
In this example, the FLL will be used (in FEE mode) to multiply the external 4 MHz oscillator up to
40-MHz to achieve 20 MHz bus frequency.
After the MCU is released from reset, the ICG is in self-clocked mode (SCM) and supplies approximately
8 MHz on ICGOUT which corresponds to a 4 MHz bus frequency (f
During reset initialization software, the clock scheme will be set to FLL engaged, external (FEE). So
Solving for N / R gives:
The values needed in each register to set up the desired operation are:
ICGC1 = $78 (%01111000)
ICGC2 = $30 (%00110000)
ICGS1 = $xx
ICGS2 = $xx
ICGFLTLU/L = $xx
ICGTRM
Freescale Semiconductor
Bit 7
Bit 6
Bit 5
Bits 4:3 CLKS
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6:4 MFD
Bit 3
Bit 2:0 RFD
This is read only except for clearing interrupt flag
This is read only. Should read DCOS before performing any time critical tasks
Not used in this example
Not used in this example
Example #2: External Crystal = 4 MHz, Bus Frequency = 20 MHz
HGO
RANGE
REFS
OSCSTEN 0
LOCD
LOLRE
LOCRE
N / R = 40 MHz /(4 MHz * 1) = 10 ; We can choose N = 10 and R = 1
f
0
1
1
11
0
0
0
011 Sets the MFD multiplication factor to 10
0
000 Sets the RFD division factor to ÷1
ICGOUT
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Configures oscillator for low power
Configures oscillator for high-frequency range; FLL prescale factor is 1
Requests an oscillator
FLL engaged, external reference clock mode
Disables the oscillator
Loss-of-clock detection enabled
Unimplemented or reserved, always reads zero
Generates an interrupt request on loss of lock
Generates an interrupt request on loss of clock
= f
ext
* P * N / R ; P = 1, f
ext
= 4.00 MHz
Chapter 10 Internal Clock Generator (S08ICGV4)
Bus
).
Eqn. 10-3
Eqn. 10-4
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