PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 88

• Manufacturer Part Number: PCM18XT0
• Description: MODULE PROC PIC18F4685
• Manufacturer: Microchip Technology

Specifications of PCM18XT0

• Accessory Type: Processor Module
• Product: Microcontroller Modules
• Core Processor: PIC18F4685
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICE2000
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

PIC18F2682/2685/4682/4685
TABLE 5-2:
DS39761C-page 88
RXF12EIDL
RXF12EIDH
RXF12SIDL
RXF12SIDH
RXF11EIDL
RXF11EIDH
RXF11SIDL
RXF11SIDH
RXF10EIDL
RXF10EIDH
RXF10SIDL
RXF10SIDH
RXF9EIDL
RXF9EIDH
RXF9SIDL
RXF9SIDH
RXF8EIDL
RXF8EIDH
RXF8SIDL
RXF8SIDH
RXF7EIDL
RXF7EIDH
RXF7SIDL
RXF7SIDH
RXF6EIDL
RXF6EIDH
RXF6SIDL
RXF6SIDH
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Note 1:
File Name
2:
3:
4:
5:
6:
7:
8:
9:
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset
(BOR)”.
These registers and/or bits are not implemented on PIC18F2682/2685 devices and are read as ‘0’. Reset values are shown for PIC18F4682/4685
devices; individual unimplemented bits should be interpreted as ‘—’.
The PLLEN bit is only available in specific oscillator configurations; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in INTOSC
Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes. When
disabled, these bits read as ‘0’.
CAN bits have multiple functions depending on the selected mode of the CAN module.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
These registers and/or bits are available on PIC18F4682/4685 devices only.
EID15
SID10
EID15
SID10
EID15
SID10
EID15
SID10
EID15
SID10
EID15
SID10
EID15
SID10
Bit 7
EID7
SID2
EID7
SID2
EID7
SID2
EID7
SID2
EID7
SID2
EID7
SID2
EID7
SID2
REGISTER FILE SUMMARY (PIC18F2682/2685/4682/4685) (CONTINUED)
EID14
EID14
EID14
EID14
EID14
EID14
EID14
EID6
SID1
SID9
EID6
SID1
SID9
EID6
SID1
SID9
EID6
SID1
SID9
EID6
SID1
SID9
EID6
SID1
SID9
EID6
SID1
SID9
Bit 6
EID13
EID13
EID13
EID13
EID13
EID13
EID13
EID5
SID0
SID8
EID5
SID0
SID8
EID5
SID0
SID8
EID5
SID0
SID8
EID5
SID0
SID8
EID5
SID0
SID8
EID5
SID0
SID8
Bit 5
EID12
EID12
EID12
EID12
EID12
EID12
EID12
EID4
SID7
EID4
SID7
EID4
SID7
EID4
SID7
EID4
SID7
EID4
SID7
EID4
SID7
Bit 4
—
—
—
—
—
—
—
EXIDEN
EXIDEN
EXIDEN
EXIDEN
EXIDEN
EXIDEN
EXIDEN
EID11
EID11
EID11
EID11
EID11
EID11
EID11
Bit 3
EID3
SID6
EID3
SID6
EID3
SID6
EID3
SID6
EID3
SID6
EID3
SID6
EID3
SID6
EID10
EID10
EID10
EID10
EID10
EID10
EID10
EID2
SID5
EID2
SID5
EID2
SID5
EID2
SID5
EID2
SID5
EID2
SID5
EID2
SID5
Bit 2
—
—
—
—
—
—
—
EID17
EID17
EID17
EID17
EID17
EID17
EID17
EID1
EID9
SID4
EID1
EID9
SID4
EID1
EID9
SID4
EID1
EID9
SID4
EID1
EID9
SID4
EID1
EID9
SID4
EID1
EID9
SID4
Bit 1
© 2009 Microchip Technology Inc.
EID16
EID16
EID16
EID16
EID16
EID16
EID16
EID0
EID8
SID3
EID0
EID8
SID3
EID0
EID8
SID3
EID0
EID8
SID3
EID0
EID8
SID3
EID0
EID8
SID3
EID0
EID8
SID3
Bit 0
xxxx xxxx 62, 306
xxxx xxxx 62, 306
xxx- x-xx 62, 305
xxxx xxxx 62, 305
xxxx xxxx 62, 306
xxxx xxxx 62, 306
xxx- x-xx 62, 305
xxxx xxxx 62, 305
xxxx xxxx 62, 306
xxxx xxxx 62, 306
xxx- x-xx 62, 305
xxxx xxxx 62, 305
xxxx xxxx 62, 306
xxxx xxxx 62, 306
xxx- x-xx 62, 305
xxxx xxxx 62, 305
xxxx xxxx 62, 306
xxxx xxxx 62, 306
xxx- x-xx 62, 305
xxxx xxxx 62, 305
xxxx xxxx 62, 306
xxxx xxxx 62, 306
xxx- x-xx 62, 305
xxxx xxxx 62, 305
xxxx xxxx 62, 306
xxxx xxxx 62, 306
xxx- x-xx 62, 305
xxxx xxxx 62, 305
POR, BOR
Value on
on page:
Details