PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 254

• Manufacturer Part Number: PCM18XT0
• Description: MODULE PROC PIC18F4685
• Manufacturer: Microchip Technology

Specifications of PCM18XT0

• Accessory Type: Processor Module
• Product: Microcontroller Modules
• Core Processor: PIC18F4685
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICE2000
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

PIC18F2682/2685/4682/4685
19.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 19-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 kΩ. After the analog input channel is
selected (changed), the channel must be sampled for
at least the minimum acquisition time before starting a
conversion.
EQUATION 19-1:
EQUATION 19-2:
EQUATION 19-3:
DS39761C-page 254
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25°C. Below 25°C, T
T
T
ACQ
DD
Note:
C
ACQ
AMP
COFF
C
ACQ
HOLD
). The source impedance affects the offset voltage
=
=
A/D Acquisition Requirements
SS
=
=
=
=
=
=
=
SS
) impedance varies over the device voltage
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
) impedance directly affect the time
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
(V
-(C
T
5 μs
(Temp – 25°C)(0.05 μs/°C)
(50°C – 25°C)(0.05 μs/°C)
1.25 μs
-(C
-(120 pF) (1 kΩ + 7 kΩ + 2.5 kΩ) ln(0.0004883) μs
9.61 μs
5 μs + 1.25 μs + 9.61 μs
12.86 μs
AMP
AMP
REF
HOLD
HOLD
+ T
+ T
– (V
)(R
)(R
C
C
A/D ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED A/D ACQUISITION TIME
S
REF
+ T
+ T
) and the internal sampling
IC
IC
+ R
COFF
/2048)) • (1 – e
+ R
COFF
SS
SS
HOLD
+ R
+ R
HOLD
S
S
) must be allowed
) ln(1/2048)
) ln(1/2047) μs
. The sampling
(-Tc/C
HOLD
(R
IC
+ R
SS
+ R
S
))
)
To
Equation 19-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Example 19-3 shows the calculation of the minimum
required acquisition time T
based
assumptions:
C
Rs
Conversion Error
V
Temperature
V
HOLD
DD
HOLD
calculate
on
COFF
the
= 0 ms.
the
=
=
≤
=
=
=
following
minimum
© 2009 Microchip Technology Inc.
120 pF
2.5 kΩ
1/2 LSb
5V → Rss = 7 kΩ
50°C (system max.)
0V @ time = 0
ACQ
. This calculation is
application
acquisition
system
time,