PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 147

• Manufacturer Part Number: PCM18XT0
• Description: MODULE PROC PIC18F4685
• Manufacturer: Microchip Technology

Specifications of PCM18XT0

• Accessory Type: Processor Module
• Product: Microcontroller Modules
• Core Processor: PIC18F4685
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICE2000
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

FIGURE 10-3:
FIGURE 10-4:
TABLE 10-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
© 2009 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTE
LATE
TRISE
INTCON
PIR1
PIE1
IPR1
ADCON1
CMCON
Legend:
Note 1:
Name
PORTD<7:0>
PORTD<7:0>
(1)
(1)
(1)
(1)
2:
(1)
(1)
(1)
— = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
These registers are available on PIC18F4682/4685 devices only.
These bits are unimplemented on PIC18F2682/2685 devices and read as ‘0’.
PSPIF
PSPIF
LATD Data Output Register
PORTD Data Direction Register
GIE/GIEH
OBF
OBF
PSPIE
PSPIP
PSPIF
WR
WR
C2OUT
IBF
IBF
RD
RD
CS
CS
Bit 7
RD7
IBF
—
—
—
(2)
(2)
(2)
PARALLEL SLAVE PORT WRITE WAVEFORMS
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
Q1
PEIE/GIEL
C1OUT
ADIE
ADIP
ADIF
Bit 6
OBF
RD6
—
—
—
Q2
Q2
TMR0IE
VCFG1
C2INV
IBOV
RCIE
RCIP
RCIF
Bit 5
RD5
Q3
Q3
—
—
PIC18F2682/2685/4682/4685
Q4
Q4
PSPMODE
VCFG0
INT0IE
C1INV
Bit 4
TXIF
TXIE
TXIP
RD4
—
—
Q1
Q1
PCFG3
Q2
Q2
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
RD3
RE3
CIS
—
—
Q3
Q3
LATE Data Output Register
TMR0IF
CCP1IE
CCP1IP
TRISE2
CCP1IF
PCFG2
Bit 2
RD2
CM2
RE2
Q4
Q4
TMR2IF
TMR2IE
TMR2IP
TRISE1
PCFG1
Q1
Q1
INT0IF
Bit 1
RD1
CM1
RE1
Q2
Q2
TMR1IF
TMR1IE
TMR1IP
TRISE0
PCFG0
DS39761C-page 147
Bit 0
RBIF
CM0
RD0
RE0
Q3
Q3
on page
Values
Q4
Q4
Reset
54
54
54
54
54
54
51
54
54
54
52
53