HYB18T1G160BF-5 Qimonda, HYB18T1G160BF-5 Datasheet - Page 46

• Manufacturer Part Number: HYB18T1G160BF-5
• Description: IC DDR2 SDRAM 1GBIT 84TFBGA
• Manufacturer: Qimonda

Specifications of HYB18T1G160BF-5

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 1G (64M x 16)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 84-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 675-1018-2

1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,
3) Inputs are not recognized as valid until
4) The output timing reference voltage level is
5)
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,
Rev. 1.3, 2007-07
03062006-ZNH8-HURV
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Frequency
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Frequency
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal
OCD drive strength (EMRS(1) A1 = 0) under the “Reference Load for Timing Measurements”.
input reference level is the crosspoint when in differential strobe mode; The input reference level for signals other than CK/CK, DQS / DQS,
RDQS / RDQS is defined.
t
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal
OCD drive strength (EMRS(1) A1 = 0) under the “Reference Load for Timing Measurements”.
input reference level is the crosspoint when in differential strobe mode; The input reference level for signals other than CK/CK, DQS / DQS,
RDQS / RDQS is defined.
RAS.MAX
is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is equal to 9 x
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 3
@ CL = 4
@ CL = 5
V
REF
Symbol
t
t
t
t
t
t
t
V
CK
CK
CK
RAS
RC
RCD
RP
stabilizes. During the period before
TT
.
Symbol
t
t
t
t
t
t
t
CK
CK
CK
RAS
RC
RCD
RP
DDR2–667C
–3
4–4–4
Min.
5
3
3
45
57
12
12
46
Speed Grade Definition Speed Bins for DDR2–533C
Speed Grade Definition Speed Bins for DDR2–667
8
8
8
70000
—
—
—
Max.
DDR2–533C
–3.7
4–4–4
Min.
5
3.75
3.75
45
60
15
15
V
REF
DDR2–667D
–3S
5–5–5
Min.
5
3.75
3
45
60
15
15
stabilizes, CKE = 0.2 x
1-Gbit Double-Data-Rate-Two SDRAM
Max.
8
8
8
70000
—
—
—
HY[B/I]18T1G[40/80/16]0B[C/F](L/V)
Max.
8
8
8
70000
—
—
—
Unit
t
—
ns
ns
ns
ns
ns
ns
ns
CK
V
DDQ
Unit
t
—
ns
ns
ns
ns
ns
ns
ns
CK
Internet Data Sheet
is recognized as low.
TABLE 50
TABLE 51
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
t
REFI
.