MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 97

• Manufacturer Part Number: MCIMX255AJM4AR2
• Description: Processors - Application Specialized IMX25 1.2 AUTO
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX255AJM4AR2

• Core: ARM926EJ-S
• Processor Series: MCIMX25
• Maximum Clock Frequency: 400 MHz
• Instruction / Data Cache Memory: 16 KB
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.15 V to 1.52 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-400
• Interface Type: USB
• Memory Type: DDR2
• Minimum Operating Temperature: - 40 C

SIMx_DATAy_RX_TX
3.7.14.1
SIM cards may have internal reset, or active low reset. The following subset describes the reset sequences
in these two cases.
3.7.14.1.1
Figure 69
following steps:
Table 75
3.7.14.1.2
Figure 70
following steps:
Freescale Semiconductor
SIMn_SVENm
SIMx_CLKy
•
•
•
•
•
•
•
•
After power-up, the clock signal is enabled on SIMx_CLKy (time T0)
After 200 clock cycles, SIMx_DATAy_RX_TX must be asserted.
The card must send a response on SIMx_DATAy_RX_TX acknowledging the reset between
400–40000 clock cycles after T0.
After power-up, the clock signal is enabled on SIMx_CLKy (time T0)
After 200 clock cycles, SIMx_DATAy_RX_TX must be asserted.
SIMx_RSTy must remain low for at least 40,000 clock cycles after T0 (no response is to be received
on RX during those 40,000 clock cycles)
SIMx_RSTy is asserted (at time T1)
SIMx_RSTy must remain asserted for at least 40,000 clock cycles after T1, and a response must be
received on SIMx_DATAy_RX_TX between 400 and 40,000 clock cycles after T1.
defines the general timing requirements for the SIM interface.
shows the reset sequence for SIM cards with active low reset. The reset sequence comprises the
shows the reset sequence for SIM cards with internal reset. The reset sequence comprises the
Ref No.
SIM Reset Sequences
1
2
SIM Cards with Internal Reset
SIM Cards with Active Low Reset
T0
Table 75. Timing Specifications, Internal Reset Card Reset Sequence
i.MX25 Applications Processor for Automotive Products, Rev. 9
1
Figure 69. Internal Reset Card Reset Sequence
2
Min.
400
—
RESPONSE
40,000
Max.
200
clk cycles
clk cycles
Units
97