MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 78

no-image

MCIMX255AJM4AR2

Manufacturer Part Number
MCIMX255AJM4AR2
Description
Processors - Application Specialized IMX25 1.2 AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MCIMX255AJM4AR2

Core
ARM926EJ-S
Processor Series
MCIMX25
Maximum Clock Frequency
400 MHz
Instruction / Data Cache Memory
16 KB
Data Ram Size
128 KB
Operating Supply Voltage
1.15 V to 1.52 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-400
Interface Type
USB
Memory Type
DDR2
Minimum Operating Temperature
- 40 C
1
2
3
4
5
6
7
8
9
78
For the value of parameters WE4–WE21, see column BCD = 0 in
CS Assertion. This bit field determines when the CS signal is asserted during read/write cycles.
CS Negation. This bit field determines when the CS signal is negated during read/write cycles.
BE Assertion. This bit field determines when the BE signal is asserted during read cycles.
BE Negation. This bit field determines when the BE signal is negated during read cycles.
Output maximum delay from internal driving ADDR/control FFs to chip outputs.
Output maximum delay from CS[x] internal driving FFs to CS[x] out.
DATA maximum delay from chip input data to its internal FF.
DTACK maximum delay from chip dtack input to its internal FF.
All configuration parameters (CSA, CSN, EBWA, EBWN, LBA, LBN,
LAH, OEN, OEA, EBRA, and EBRN) are in cycle units.
i.MX25 Applications Processor for Automotive Products, Rev. 9
NOTE
Table
56.
Freescale Semiconductor

Related parts for MCIMX255AJM4AR2