MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 16

• Manufacturer Part Number: MCIMX255AJM4AR2
• Description: Processors - Application Specialized IMX25 1.2 AUTO
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX255AJM4AR2

• Core: ARM926EJ-S
• Processor Series: MCIMX25
• Maximum Clock Frequency: 400 MHz
• Instruction / Data Cache Memory: 16 KB
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.15 V to 1.52 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-400
• Interface Type: USB
• Memory Type: DDR2
• Minimum Operating Temperature: - 40 C

3.2
Any i.MX25 board design must comply with the power-up and power-down sequence guidelines given in
this section to ensure reliable operation of the device. Recommended power-up and power-down
sequences are given in the following subsections.
3.2.1
For those users that are not using DryIce/SRTC, the following power-up sequence is recommended:
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1. Assert power on reset (POR).
2. Turn on QVDD digital logic domain supplies.
3. Turn on NVCCx digital I/O power supplies after QVDD is stable.
4. Turn on all other analog power supplies, including USBPHY1_VDDA_BIAS,
5. Negate the POR signal.
USBPHY1_UPLL_VDD, USBPHY1_VDDA, USBPHY2_VDD, OSC24M_VDD,
MPPLL_VDD, UPLL_VDD, NVCC_ADC, and FUSEVDD (FUSEVDD is tied to GND if fuses
are not programmed), after all NVCCx digital I/O supplies are stable.
Supply Power-Up/Power-Down Requirements and Restrictions
Power-Up Sequence
Deviations from the guidelines in this section may result in the following
situations:
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For security applications, the coin battery must be connected during both
power-up and power-down sequences to ensure that security keys are not
unintentionally erased.
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Excessive current during power-up phase
Prevention of the device from booting
Irreversible damage to the i.MX25 (worst-case scenario)
The user is advised to connect FUSEVDD to GND except when fuses
are programmed, to prevent unintentional blowing of fuses.
Other power-up sequences may be possible; however, the above
sequence has been verified and is recommended.
There is a 1 ms minimum time between supplies coming up, and a 1 ms
minimum time between POR_B assert and de-assert.
The dV/dT should be no faster than 0.25 V/ s for all power supplies, to
avoid triggering ESD circuit.
i.MX25 Applications Processor for Automotive Products, Rev. 9
CAUTION
NOTE
NOTE
Freescale Semiconductor