MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 113

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MCIMX255AJM4AR2

Manufacturer Part Number
MCIMX255AJM4AR2
Description
Processors - Application Specialized IMX25 1.2 AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MCIMX255AJM4AR2

Core
ARM926EJ-S
Processor Series
MCIMX25
Maximum Clock Frequency
400 MHz
Instruction / Data Cache Memory
16 KB
Data Ram Size
128 KB
Operating Supply Voltage
1.15 V to 1.52 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-400
Interface Type
USB
Memory Type
DDR2
Minimum Operating Temperature
- 40 C
Figure 83
shows the timing for ADC normal operation.
Figure 83. Timing for ADC Normal Operation
When the ADC is used so that the idle clock cycles occur between conversions (due to the negation of soc),
the selin inputs must be stable at least 1 clock cycle before the clock's rising edge where the soc signal is
latched. Also, selrefp and selrefn must be stable by the time the soc signal is latched. These conditions are
met if enadc=1 and reset=0 throughout ADC operation, including the idle cycles. If the conditions are not
met, or if power is lost during ADC operation, then a new start-up sequence is required for ADC to become
operational again.
i.MX25 Applications Processor for Automotive Products, Rev. 9
Freescale Semiconductor
113

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