MCIMX255AJM4AR2 Freescale Semiconductor, MCIMX255AJM4AR2 Datasheet - Page 106

• Manufacturer Part Number: MCIMX255AJM4AR2
• Description: Processors - Application Specialized IMX25 1.2 AUTO
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX255AJM4AR2

• Core: ARM926EJ-S
• Processor Series: MCIMX25
• Maximum Clock Frequency: 400 MHz
• Instruction / Data Cache Memory: 16 KB
• Data Ram Size: 128 KB
• Operating Supply Voltage: 1.15 V to 1.52 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-400
• Interface Type: USB
• Memory Type: DDR2
• Minimum Operating Temperature: - 40 C

3.7.17.2
Figure 79
parameters (SS1–SS51) shown in the figure.
106
SS11
SS13
SS20
SS21
SS47
SS1
SS2
SS3
SS4
SS5
SS7
SS9
ID
shows the timing for the SSI receiver with internal clock.
(Tx/Rx) CK clock period
(Tx/Rx) CK clock high period
(Tx/Rx) CK clock rise time
(Tx/Rx) CK clock low period
(Tx/Rx) CK clock fall time
(Rx) CK high to FS (bl) high
(Rx) CK high to FS (bl) low
(Rx) CK high to FS (wl) high
(Rx) CK high to FS (wl) low
SRXD setup time before (Rx) CK low
SRXD hold time after (Rx) CK low
Oversampling clock period
AUDn_TXFS (wl)
SSI Receiver Timing with Internal Clock
AUDn_TXFS (bl)
AUDn_RXD
AUDn_RXC
AUDn_TXC
(Output)
(Output)
(Output)
(Output)
(Input)
i.MX25 Applications Processor for Automotive Products, Rev. 9
Figure 79. SSI Receiver Internal Clock Timing Diagram
SS48
SS2
Table 82. SSI Receiver Timing with Internal Clock
SS7
Parameter
Oversampling Clock Operation
SS47
Internal Clock Operation
SS1
SS11
SS9
SS20
SS51
SS5
SS4
SS50
SS21
Table 82
15.04
Min.
81.4
36.0
36.0
10.0
0.0
—
—
—
—
—
—
SS49
SS3
describes the timing
Freescale Semiconductor
Max.
15.0
15.0
15.0
15.0
6.0
6.0
—
—
—
—
—
—
SS13
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns