XRT83SL38ES Exar, XRT83SL38ES Datasheet - Page 5

• Manufacturer Part Number: XRT83SL38ES
• Description: Peripheral Drivers & Components - PCIs 8 CHT1/E1LIUSH
• Manufacturer: Exar

Specifications of XRT83SL38ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.2
GENERAL DESCRIPTION .................................................................................................. 1
TABLE OF CONTENTS ....................................................................................................... I
PIN DESCRIPTION BY FUNCTION .................................................................................... 6
FUNCTIONAL DESCRIPTION .......................................................................................... 23
RECEIVER ......................................................................................................................... 24
TRANSMITTER ................................................................................................................. 28
TRANSMIT AND RECEIVE TERMINATIONS .................................................................. 31
A
F
R
T
M
JITTER
C
A
P
PINS ONLY AVAILABLE IN BGA PACKAGE .......................................................................................... 22
M
R
R
R
R
R
J
G
A
D
T
T
D
T
RECEIVER (C
ITTER
EATURES
RANSMITTER
RANSMIT
RANSMIT
RANSMIT
PPLICATIONS
LARM
OWER AND
RBITRARY
ECEIVE
LOCK
ECEIVER
ECEIVE
ECEIVER
ECEIVE
ECOVERED
APPED
IGITAL
RIVER
ICROPROCESSOR
ASTER
Figure 1. Block Diagram of the XRT83SL38 T1/E1/J1 LIU (Host Mode) ........................................ 1
Figure 2. Block Diagram of the XRT83SL38 T1/E1/J1 LIU (Hardware Mode) ............................... 2
ORDERING INFORMATION ............................................................................................................... 3
Figure 3. Two Input Clock Source .................................................................................................. 23
Figure 4. One Input Clock Source .................................................................................................. 23
T
Figure 5. Simplified Diagram of -15dB T1/E1 Short Haul Mode and RLOS Condition .............. 25
Figure 6. Simplified Diagram of -29dB T1/E1 Gain Mode and RLOS Condition ......................... 26
Figure 7. Receive Clock and Output Data Timing ........................................................................ 26
T
Figure 8. Arbitrary Pulse Segment Assignment ........................................................................... 28
Figure 9. Transmit Clock and Input Data Timing .......................................................................... 29
T
T
T
Internal Receive Termination Mode ..................................................................................................................... 31
T
Figure 10. Simplified Diagram for the Internal Receive and Transmit Termination Mode ........ 31
T
Figure 11. Simplified Diagram for T1 in the External Termination Mode (RXTSEL= 0) ............. 33
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
A
A
S
F
F
D
TTENUATOR
UNCTIONS
C
TTENUATOR
C
YNTHESIZER
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
S
M
HDB3/B8ZS D
AILURE
ATA
LOCK
I
L
LOCK
C
HDB3/B8ZS E
P
ECTIONS
NPUT
ONITOR
1: M
2: M
3: E
4: E
5: R
6: R
7: R
................................................................................................................................................... 2
P
OSS OF
ULSE
LOCK
G
C
ULSE
S
F
ROUND
LOCK
.............................................................................................................................................. 1
HANNELS
ORMAT
XAMPLES OF
XAMPLES OF
ECTIONS
ECEIVE
ECEIVE
ECEIVE
ASTER
AXIMUM
G
(JA M
M
........................................................................................................................................ 24
S
(TCLK) S
ENERATOR
/R
G
ONITOR
M
HAPER
I
S
...................................................................................................................................... 6
NTERFACE
(RCLK) S
ENERATOR FOR T
EDUNDANCY
ODE
.................................................................................................................................. 15
.................................................................................................................................. 27
IGNAL
................................................................................................................................. 15
UST BE
................................................................................................................................ 20
C
............................................................................................................................... 28
E
T
T
ECODER
G
0 - 7) ................................................................................................................... 31
LOCK
ERMINATION
ERMINATIONS
QUALIZER
.............................................................................................................................. 8
NCODER
........................................................................................................................... 25
AP
& L
(DMO) ............................................................................................................. 29
(RLOS) ........................................................................................................... 25
AMPLING
HDB3 E
B8ZS E
W
..................................................................................................................... 23
INE
E
AMPLING
G
................................................................................................................... 12
NABLED IN THE
IDTH FOR
ENERATOR
S
............................................................................................................... 26
B
.............................................................................................................. 29
TABLE OF CONTENTS
UPPORT
UILD
C
E
NCODING
ONTROL AND
NCODING
1
C
DGE
....................................................................................................... 33
ONTROL
E
AND E
O
DGE
M
UT
ULTIPLEXER
................................................................................................ 28
............................................................................................... 17
............................................................................................... 24
(LBO)
1 .......................................................................................... 28
............................................................................................ 26
T
........................................................................................... 29
.......................................................................................... 29
RANSMIT
......................................................................................... 31
T
RANSMIT
CIRCUIT
I
/M
P
APPER
ATH
...................................................................... 30
L
INE
) ................................................................ 27
A
B
PPLICATIONS
UILD
-O
UT
S
ETTINGS
........................................ 27
........................... 30
XRT83SL38