XRT83SL38ES Exar, XRT83SL38ES Datasheet - Page 33

• Manufacturer Part Number: XRT83SL38ES
• Description: Peripheral Drivers & Components - PCIs 8 CHT1/E1LIUSH
• Manufacturer: Exar

Specifications of XRT83SL38ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.2
TRANSMIT AND RECEIVE TERMINATIONS
The XRT83SL38 is a versatile LIU that can be programmed to use one Bill of Materials (BOM) for worldwide
applications for T1, J1 and E1. For specific applications the internal terminations can be disabled to allow the
use of existing components and/or designs.
RECEIVER (CHANNELS 0 - 7)
I
In Hardware mode, RXTSEL (Pin 83) can be tied “High” to select internal termination mode for all receive
channels or tied “Low” to select external termination mode. Individual channel control can only be done in Host
mode. By default the XRT83SL38 is set for external termination mode at power up or at Hardware reset.
In Host mode, bit 7 in the appropriate channel register,
Description,” on page
channel.
F
NTERNAL
IGURE
EQC4
RNEG
T NEG
R PO S
T PO S
T CLK
RCLK
1
1
10. S
R
ECEIVE
EQC3
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
IMPLIFIED
1
1
T
ABLE
Line Driver
T
Equilizer
ERMINATION
T X
EQC2
RX
5: R
1
1
D
52), is set “High” to select the internal termination mode for that specific receive
IAGRAM FOR THE
ECEIVE
EQC1
1
1
M
E
ODE
T
QUALIZER
ABLE
Channel _n
RXTSEL
R
R
EQC0
int
int
0
1
0
1
6: R
I
NTERNAL
R
int
C
ECEIVE
ONTROL AND
E1/T1 M
TRIN G
RRING
E1 Gain Mode
E1 Gain Mode
RTIP
R
TTIP
S
T
ECEIVE AND
ENSITIVITY
31
ERMINATION
ODE
& R
T
RX TERMINATION
RANSMIT
0.68
(Table 20, “Microprocessor Register #1, Bit
ECEIVE
EXTERNAL
μ
INTERNAL
F
T
C
RANSMIT
ONTROL
L
ITU G.703/Arbitrary
ITU G.703/Arbitrary
1
4
5
8
INE
T
RANSMIT
1:2
1:1
T 1
T 2
B
T
UILD
ERMINATION
5
1
8
4
-O
LBO
UT
S
ETTINGS
M
75 Ω Coax
120 Ω TP
ODE
C
ABLE
XRT83SL38
RTIP
RR ING
TTIP
TRING
75
110
75
110
Ω
Ω
Ω
Ω
, 100
, 100
or 120
or 120
C
HDB3
HDB3
ODING
Ω
Ω
Ω
Ω