XRT83SL38ES Exar, XRT83SL38ES Datasheet - Page 21

• Manufacturer Part Number: XRT83SL38ES
• Description: Peripheral Drivers & Components - PCIs 8 CHT1/E1LIUSH
• Manufacturer: Exar

Specifications of XRT83SL38ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.2
RDY_DTACK
S
IGNAL
WR_R/W
ALE_AS
RXTSEL
TXTSEL
RD_DS
EQC4
EQC3
EQC2
EQC1
EQC0
CS
N
AME
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
L
EAD
U11
V11
C7
D7
C7
D7
A6
B7
A7
A6
B7
A7
#
T
YPE
O
I
I
I
I
I
I
I
Equalizer Control Input 4 - Hardware mode
This pin together with pins EQC[3:0] is used to control the transmit pulse shaping,
transmit line build-out (LBO) and receive monitoring while operating at one of either the
T1, E1 or J1 clock rates/modes.
TRANSMIT LINE BUILD-OUT SETTINGS” ON PAGE 30.
Transmit Equalizer Control bits.
Equalizer Control Input 3
Equalizer Control Input 2
Equalizer Control Input 1
Equalizer Control Input 0
N
In Host mode, these pins perform various microprocessor functions.
PROCESSOR INTERFACE” ON PAGE 12.
N
Receiver Termination Select
In Hardware mode, when this pin is “Low” the receive line termination is determined
only by an external resistor. When “High”, the receive termination is realized by the
internal resistor or the combination of internal and external resistors. These conditions
are described in the table below.
N
In Host mode, the RXTSEL_n bits in the channel control registers determine if the
receiver termination is external or internal. However, the function of RXTSEL can be
transferred to the Hardware pin by setting the TERCNTL bit (bit 6) to “1” in the register
address hex 0x82.
N
Transmit Termination Select - Hardware Mode
When this pin is “Low” the transmit line termination is determined only by an external
resistor. When “High”, the transmit termination is realized only by the internal resistor.
N
OTES
OTE
OTE
OTE
OTES
1. In Hardware mode all transmit channels share the same pulse setting
2. All channels of an XRT83L38 must operate at the same clock rate, either the
1. This pin is internally pulled “Low” with a 50kΩ resistor.
2. In Hardware mode all channels share the same TXTSEL control function.
: Internally pulled “Low” with a 50kΩ resistor.
: In Hardware mode all channels share the same RXTSEL control function.
: This pin is internally pulled “Low” with a 50kΩ resistor.
:
:
controls function.
T1, E1 or J1 modes.
19
RXTSEL
TXTSEL
0
1
0
1
SEE”RECEIVE EQUALIZER CONTROL AND
D
ESCRIPTION
RX Termination
TX Termination
External
External
Internal
Internal
for description of
XRT83SL38
SEE”MICRO-