XRT83SL38ES Exar, XRT83SL38ES Datasheet - Page 16
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XRT83SL38ES
Manufacturer Part Number
XRT83SL38ES
Description
Peripheral Drivers & Components - PCIs 8 CHT1/E1LIUSH
Manufacturer
Exar
Datasheet
1.XRT83SL38ES.pdf
(88 pages)
Specifications of XRT83SL38ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
- Current page: 16 of 88
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XRT83SL38
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
S
IGNAL
LOOP1_3
LOOP0_3
LOOP1_2
LOOP0_2
LOOP1_1
LOOP0_1
LOOP1_0
LOOP0_0
TRATIO
µPCLK
ATAOS
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
INT
N
AME
L
A12
B10
A10
C10
A12
B10
A10
C10
EAD
B11
C11
D11
A11
B11
C11
D11
A11
T13
T13
L16
L16
#
T
YPE
O
I
I
I
Microprocessor Interface Address Bus Pins - Host mode:
Microprocessor Interface Address Bus[7]
Microprocessor Interface Address Bus[6]
Microprocessor Interface Address Bus[5]
Microprocessor Interface Address Bus[4]
Microprocessor Interface Address Bus[3]
Microprocessor Interface Address Bus[2]
Microprocessor Interface Address Bus[1]
Microprocessor Interface Address Bus[0]
Loop-back Control Pins, Bits [1:0] Channel_[3:0]
In Hardware mode, pins 67-74 and 173-180 control which Loop-Back mode is
selected per channel.
CHANNEL_[7:0]” ON PAGE 18.
N
Microprocessor Clock Input - Host Mode:
Input clock for synchronous microprocessor operation. Maximum clock rate is 54
MHz.
N
Automatic Transmit “All Ones” - Hardware mode
This pin functions as an Automatic Transmit “All Ones”.
TRANSMIT “ALL ONES” PATTERN - HARDWARE MODE” ON PAGE 17.
Interrupt Output - Host mode
This pin goes “Low” to indicate an alarm condition has occurred within the device.
Interrupt generation can be globally disabled by setting the GIE bit to a “0” in the com-
mand control register.
Transmitter Transformer Ratio Select - Hardware mode
The function of this pin is to select the transmitter transformer ratio.
MITTER TRANSFORMER RATIO SELECT - HARDWARE MODE” ON
PAGE 17.
N
OTE
OTE
OTE
: These pins are internally pulled “Low” with a 50kΩ resistor.
: This pin is internally pulled “Low” with a 50kΩ resistor for asynchronous
: This pin is an open drain output and requires an external 10kΩ pull-up resistor.
microprocessor interface when no clock is present.
SEE”LOOP-BACK CONTROL PINS, BITS [1:0]
14
D
ESCRIPTION
SEE”AUTOMATIC
SEE”TRANS-
REV. 1.0.2
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