MT47H32M16HR-25E AIT:G Micron, MT47H32M16HR-25E AIT:G Datasheet - Page 94

• Manufacturer Part Number: MT47H32M16HR-25E AIT:G
• Description: DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA
• Manufacturer: Micron

READ with Auto Precharge
Table 41: READ Using Concurrent Auto Precharge
PDF: 09005aef8440dbbc
512mbddr2_ait_aat.pdf – Rev. C 7/11 EN
From Command (Bank n)
READ with auto precharge
If A10 is high when a READ command is issued, the READ with auto precharge function
is engaged. The DDR2 SDRAM starts an auto precharge operation on the rising clock
edge that is AL + (BL/2) cycles later than the read with auto precharge command provi-
ded
edge, the start point of the auto precharge operation will be delayed until
satisfied. If
to precharge operation will be delayed until
precharge is pushed out by
happens (not at the next rising clock edge after this event).
When BL = 4, the minimum time from READ with auto precharge to the next ACTIVATE
command is AL + (
auto precharge to the next ACTIVATE command is AL + 2 clocks + (
term (
tion can also be used: AL + BL/2 - 2CK + (
charge does not start earlier than two clocks after the last 4-bit prefetch.
READ with auto precharge command may be applied to one bank while another bank is
operational. This is referred to as concurrent auto precharge operation, as noted in Ta-
ble 41. Examples of READ with precharge and READ with auto precharge with applica-
ble timing requirements are shown in Figure 50 (page 95) and Figure 51 (page 96),
respectively.
t
WRITE or WRITE with auto precharge
RAS (MIN) and
READ or READ with auto precharge
t
RTP +
PRECHARGE or ACTIVATE
To Command (Bank m)
t
Micron Confidential and Proprietary
RTP (MIN) is not satisfied at this rising clock edge, the start point of the au-
t
RP)/
t
t
CK is always rounded up to the next integer. A general purpose equa-
RTP +
t
RTP are satisfied. If
t
RP)/
t
RTP ,
94
512Mb: x8, x16 Automotive DDR2 SDRAM
t
CK. When BL = 8, the minimum time from READ with
t
RP starts at the point where the internal precharge
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
t
RAS (MIN) is not satisfied at this rising clock
RTP +
(with Concurrent Auto Precharge)
t
RTP (MIN) is satisfied. When the internal
t
RP)/
t
Minimum Delay
CK. In any event, the internal pre-
(BL/2) + 2
BL/2
1
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t
RTP +
t
t
RP)/
RAS (MIN) is
t
CK. The
READ
Units
t
t
t
CK
CK
CK