MT47H32M16HR-25E AIT:G Micron, MT47H32M16HR-25E AIT:G Datasheet - Page 67

• Manufacturer Part Number: MT47H32M16HR-25E AIT:G
• Description: DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA
• Manufacturer: Micron

Table 37: Truth Table – Current State Bank n – Command to Bank n
Notes: 1–6 apply to the entire table
PDF: 09005aef8440dbbc
512mbddr2_ait_aat.pdf – Rev. C 7/11 EN
Current
State
Any
Idle
Row active
Read (auto
precharge
disabled)
Write
(auto pre-
charge disa-
bled)
CS#
H
L
L
L
L
L
L
L
L
L
L
L
L
L
Notes:
RAS#
X
H
H
H
H
H
H
H
L
L
L
L
L
L
6. Bank addresses (BA) determine which bank is to be operated upon. BA during a LOAD
7. SELF REFRESH exit is asynchronous.
8. Burst reads or writes at BL = 4 cannot be terminated or interrupted. See Figure 46
9. The power-down mode does not perform any REFRESH operations. The duration of
1. This table applies when CKEn - 1 was HIGH and CKEn is HIGH and after
2. This table is bank-specific, except where noted (the current state is for a specific bank
3. Current state definitions:
4. The following states must not be interrupted by a command issued to the same bank.
MODE command selects which mode register is programmed.
(page 92) and Figure 58 (page 103) for other restrictions and details.
power-down is limited by the refresh requirements outlined in the AC parametric sec-
tion.
CAS#
met (if the previous state was self refresh).
and the commands shown are those allowed to be issued to that bank when in that
state). Exceptions are covered in the notes below.
Issue DESELECT or NOP commands, or allowable commands to the other bank, on any
clock edge occurring during these states. Allowable commands to the other bank are
determined by its current state and this table, and according to Table 38 (page 69).
Idle:
Row
active:
Read: A READ burst has been initiated, with auto precharge disabled and has not yet
Write: A WRITE burst has been initiated with auto precharge disabled and has not yet
H
H
H
H
H
X
L
L
L
L
L
L
L
L
Micron Confidential and Proprietary
The bank has been precharged,
plete.
A row in the bank has been activated, and
accesses and no register accesses are in progress.
terminated.
terminated.
WE#
X
H
H
H
H
H
H
L
L
L
L
L
L
L
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
ACTIVATE (select and activate row)
REFRESH
LOAD MODE
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE (deactivate row in bank or banks)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE (start PRECHARGE)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE (start PRECHARGE)
67
512Mb: x8, x16 Automotive DDR2 SDRAM
Command/Action
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
RP has been met, and any READ burst is com-
t
RCD has been met. No data bursts/
‹ 2010 Micron Technology, Inc. All rights reserved.
t
XSNR has been
Commands
Notes
8, 10
7
7
8
8
9
8
9
8
8
9