MT47H32M16HR-25E AIT:G Micron, MT47H32M16HR-25E AIT:G Datasheet - Page 11

• Manufacturer Part Number: MT47H32M16HR-25E AIT:G
• Description: DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA
• Manufacturer: Micron

Functional Block Diagrams
Figure 3: 64 Meg x 8 Functional Block Diagram
PDF: 09005aef8440dbbc
512mbddr2_ait_aat.pdf – Rev. C 7/11 EN
BA0, BA1
A0–A13,
RAS#
CAS#
WE#
ODT
CKE
CK#
CS#
CK
16
Address
register
registers
Control
Mode
logic
16
counter
Refresh
14
10
2
14
The DDR2 SDRAM is a high-speed CMOS, dynamic random access memory. It is inter-
nally configured as a multibank DRAM.
2
address
Row-
MUX
control
Column-
counter/
address
Bank
logic
latch
14
latch and
decoder
address
Bank 0
row-
Bank 1
Bank 2
Bank 3
Micron Confidential and Proprietary
8
2
16,384
DM mask logic
(16,384 x 256 x 32)
I/O gating
Sense amplifiers
Column
decoder
8,192
Memory
(x32)
256
Bank 0
array
Bank 1
Bank 2
Bank 3
internal
CK, CK#
COL0, COL1
32
11
512Mb: x8, x16 Automotive DDR2 SDRAM
32
32
Read
latch
CK out
drivers
Write
FIFO
CK in
and
8
8
8
8
Micron Technology, Inc. reserves the right to change products or specifications without notice.
COL0, COL1
Mask
Data
32
MUX
4
generator
1
1
1
1
8
8
8
8
DQS
registers
Input
Data
8
1
1
1
1
8
8
8
8
DQS, DQS#
Functional Block Diagrams
2
1
8
CK, CK#
DRVRS
DLL
RCVRS
2
‹ 2010 Micron Technology, Inc. All rights reserved.
sw1 sw2
sw1 sw2
sw1 sw2
sw1 sw2
R1
R1
R1
R1
R1
R1
ODT control
R2
R2
R2
R2
R2
R2
VssQ
sw3
sw3
sw3
sw3
R3
R3
R3
R3
R3
R3
VddQ
RDQS
DM
DQ0–DQ7
DQS, DQS#
RDQS#