HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 59
HD6437101
Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6437101.pdf
(560 pages)
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Addressing
Mode
PC relative
addressing
Immediate
addressing
Instruction
Format
disp:8
disp:12
Rn
#imm:8
#imm:8
#imm:8
Effective Address Calculation
The effective address is the sum of PC value and
the value that is obtained by doubling the sign-
extended 8-bit displacement (disp).
The effective address is the sum of PC value and
the value that is obtained by doubling the sign-
extended 12-bit displacement (disp).
The effective address is the sum of the register PC
and Rn.
The 8-bit immediate data (imm) for the TST, AND,
OR, and XOR instructions is zero-extended.
The 8-bit immediate data (imm) for the MOV, ADD,
and CMP/EQ instructions is sign-extended.
The 8-bit immediate data (imm) for the TRAPA
instruction is zero-extended and then quadrupled.
(sign-extended)
(sign-extended)
PC
Rn
disp
disp
PC
PC
2
2
×
×
+
Rev.1.00 Sep. 18, 2008 Page 25 of 522
+
+
PC + disp × 2
PC + disp × 2
PC + Rn
REJ09B0069-0100
Equation
PC + disp × 2
PC + disp × 2
PC + Rn
—
—
—
Section 2 CPU
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