HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 417

• Manufacturer Part Number: HD6437101
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

13.7
13.7.1
MMT operation can be disabled or enabled using the module standby control register. The initial
setting is for MMT operation to be halted. Register access is enabled by clearing module standby
mode. For details, refer to section 18, Power-Down Modes.
13.7.2
Note that the kinds of operation and contention described below occur during MMT operation.
(1) Contention between Buffer Register Write and Compare Match
If a compare match occurs in the T2 state of a buffer register (TBRU to TBRW, or TPBR) write
cycle, data is transferred from the buffer register to the compare register (TGR or TPDR) by a
buffer operation. The data transferred is the buffer register write data.
Figure 13.14 shows the timing in this case.
Figure 13.14 Contention between Buffer Register Write and Compare Match
Address
Write signal
Compare match
signal
Interrupt request
signal
Buffer register
Compare register
Pφ
Usage Notes
Module Standby Mode Setting
Notes on MMT Operation
Buffer register
write cycle
Buffer register
N
T1
address
T2
Rev.1.00 Sep. 18, 2008 Page 383 of 522
Section 13 Motor Management Timer (MMT)
M
M
Buffer register write data
REJ09B0069-0100